Hi all, and thanks for your input!
I've now got a functioning SMP+RTAI machine running with the following config:
- Vanilla kernel 2.6.19.2 with:
- RTAI 3.5-test1 release, and:
- EMC 2.1.0 developers something release (from CVS at linuxcnc.org)
Well, it was quite a journey to get where I'm right now, but it seems everything is
working OK by now. I have a BASE_PERIOD of 5000 ns and the base thread is between 3000
and 3300 ns, thanks to a separate PCI parallell I/F (thanks for the tip, Rayh!). I guess
many of my experienced problems came from the MoBo beeing too new, and thus not fully
recognized. I've done some tweaking in the BIOS settings, but the doc's for RTAI 3.4 and
upwards recommends (!) enabling some of the previously "bad" settings. My
memories, BTW, are Kingston HyperX's and I've manually entered the recommended fast
timings from the Kingston datasheet; I would, however, be very surprised if the base
thread in RTAI was kicked out of L2 cache memory since it is run so often...
Well, after getting the box running as I wanted to, I'm really happy. Of course
it would be better to run a stable release of each S/W component, but in due
time that will happen as well, I'm sure.
<>
<>To all you people developing EMC2 I'd just like to say thank you, you're
doing a fantastic work. I've been using EMC with a Sherline mill since 2004 and the
software is just getting better and better.
<>
<>
Best regards,
Per W
SWEDEN
Mario. wrote:
Oh yes :), for low latency, you also need to set up BIOS settings
properly, disabling and enabling a lot of things, setting PCI latency
to 32, etc.
Did you do this part?
What I know/heard about 2-core RTAI support, that it is experimental,
I did not yet hear of production version.
As for low latency, I did achieve a 5.7 microsecond KLAT MAX measured
with PIRT on a K7 processor running at maybe 2200MHz (Athlon XP
something), it was nForce3 chipset.
Also my notebook with SiS 740/650 chipset with Athlon XP (lovely
Palomino) gets maybe 7-14 microsecond latencies at 1GHz. I don't
remember exactly.. It was some time ago.
So for low latency, you need a FAST queue, the FETCH queue, the CACHE
queue, the CHIPSET memory and interrupt management queue. It is a lot
more that just raw processor power.
So you need adequate ratio of:
1) Processing power/queue size and delays
2) low communication and memory latency
So, for Athlon AM2 you seem to use, you need to get the highest HTT
you can - the VIA mainboard you seem to use allows for only 20%
overclock, which works without a glitch anyway, you will want to try
different combination of memory settings and processor
speed/multiplier.
DDR2 memory with 800"MHz" DDR2 CL4 latency would be advisable. You can
not count on higher latency memory modules to deliver very good RTAI
latencies ;-)
Mario out.
On 1/13/07, Ray Henry <[EMAIL PROTECTED]> wrote:
Hi Per
No help on the SMP compile and run. I don't have such a mobo here. I
do have an Athalon64 on a N8V mobo. I do not see any big jump in
latency every 6 or so iterations of the test.
I must admit when running with an 8000 base period that I was violating
the sentence in the troubleshooting wiki page
http://wiki.linuxcnc.org/cgi-bin/emcinfo.pl?TroubleShooting
"There should be no overruns, and 'lat max' should probably be
below your BASE_PERIOD setting."
I did not see any overruns from the latency test but the 8000 was below
the 12000 lat max for that box.
Rayh
On Sat, 2007-01-13 at 15:07 +0100, Per Willför wrote:
Hi!
I've got some serious problems to build an SMP kernel with RTAI
extensions, and I'm thinking that maybe someone else may have already
achieved this. I have a system with an Athlon 64 X2 4600+ on an Asus M2V
motherboard (K8T890 chipset), and I'm using Ubuntu 6.06.1 LTS with EMC2
loaded per the script on the linuxcnc.org homepage. Everything works
just great in UP mode, but I'm missing the additional processor that
sits there idle. My goal is to squeeze BASE_PERIOD as low as possible
(to get the highest stepping freq possible, or less jitter for lower
step rates), and I think an SMP kernel wold help substantially in this
regard. In UP mode BASE_PERIOD can only be lowered to about 20 µs, and I
would like to get down to 5-8 µs - I read a post by Ray H that he set
BASE_PERIOD to 8000... When I run the RTAI test program (have forgot
it's name) i get good delay numbers for 4-5 rows and then there's
something that "gets in the way" every 5th - 6 th row with much longer
latencies. My idea was to not optimize the interrupt handling and
graphics drivers or whatever, but rather enabling the other CPU. Having
tried all sorts of magma as well as vanilla kernels, it always fails
when I use the combination of SMP and RTAI.
For starters, I thought I could just use the magma kernel source and
change one thing - enable SMP - but this wasn't the case. The machine
just rebooted after i selected "magma-smp" in GRUB, if there was any
error message flashing by I'm not fast enough to read it. About the same
problems has occured with different vanilla kernels as well, sometimes
the machine just reboots after GRUB selection, sometimes I get some
output from the kernel before it freezes or crashes (BTW, is there a way
to capture the console output, like "tee:ing" it to a serial port?)
Please note that I haven't come as far as trying to start EMC2 on an SMP
kernel; I'm still trying to boot a kernel with SMP enabled and RTAI
patches. For the vanilla kernels I have been using rtai-3.4-cv and
2.6.17.6 (I started with 2.6.17.14 and went backwards unit the patch
file from RTAI could be applied without errors).
What am I doing wrong?
Per W
SWEDEN
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