Kirk Wallace wrote: > I seem to recall the ARM chips had a cache between the core and the I/O > buss. I browsed some links to the Blackfin chips and wonder if this link > indicates a more direct link between the core and the PPI and other I/O? > http://www.analog.com/en/processors-dsp/blackfin/adsp-bf537/processors/product.html > > > At 600MHz, these chips seem to scoot pretty well too. > The Blackfin is almost certainly capable of much higher software-directed I/O. But, it is also a much harder chip to use, Harvard architecture and all, and may well not be able to run a Linux system. The Beagle Board has 256 MB of main memory, cache, USB and MMC (SD memory cards) all built in.
Jon ------------------------------------------------------------------------------ All the data continuously generated in your IT infrastructure contains a definitive record of customers, application performance, security threats, fraudulent activity, and more. Splunk takes this data and makes sense of it. IT sense. And common sense. http://p.sf.net/sfu/splunk-novd2d _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
