On Thursday 28 April 2016 08:39:00 adit bhargava wrote: > THanks Gene and Andy for your inputs. > After setting the GPIO pin in output mode, I am getting the output on > CRO. setp hm2_5i25.0.gpio.023.is_output TRUE > setp hm2_5i25.0.gpio.023.invert_output FALSE > net pwm-generate <= pwmgen.0.pwm > net pwm-generate => hm2_5i25.0.gpio.023.out > > But, still the problem persists that the period is not as per software > PWMGEN (T-oN= 2ms , T-Off = 6.7 ms) , Although in Halscope I am > getting the correct pulse output. I am using the software PWM for > generating pulses like this: > loadrt pwmgen output_type=0 > setp pwmgen.0.value 0.299 > setp pwmgen.0.pwm-freq 150
If the following line is how it exists in your hal file, its quite possible the 'addf' is never executed. The addf's in the halfile control whether or not the module is added to the threads execution per instance of the thread, and the order of that execution. > setp pwmgen.0.enable TRUEaddf pwmgen.make-pulses base-thread > addf pwmgen.update base-thread > > Then I think, maybe the write_gpio function in base-thread is not > getting called correctly.I just registered that function in base > thread like this: addf hm2_5i25.0.write_gpio base-thread > Should I change something else ? > Best Regards,Adit Fix the bad edit above by moving that addf statement so that it executes in the order of that list, below the hm2_5i25.00.read and above the the hm2_5i25.00.write. In feedback controlled hal stuffs, you should for instance read first the controling value from an encoder or?, then if it needs modification before being used, the modifying hal modules should be addf'd in the same sequence as that data flows thru them, that makes the full chain of the revelant modules all be executed with the same src data, and the result on the whole process is then at the end of that threads invocation, written back to the output being controlled, all in a single instance of that threads existence. If out of order, there will be a one instance of that threads delay in the processing of the data, and that delay can and often will play tricks with the feedback because the correction of the error is delayed by one thread time for each instance the data flow is out of sequence. There is one place in my hal file where I actually use that delay to move data thru a 4 stage FIFO when the input data changes. Its made up of mux2 modules actually being used for floating point sample-hold's. The addf first executes a compare module to see if there is any diff between the encoders instant output and what is in the first "hold", if there is, march the data in the last stage of fifo one bucket to the right, then the next thread moves the 3rd 's data into the 4ths, wash, rinse and repeat for 4 thread times to do the whole fifo update. The outputs are feed to a triplet of sum2's, whose gains are setp'd such that from the 4 bits of data in the s-h buckets are feed back out with a gain of 1, thereby gobbling up much of the timing noise generated by a spacing error or slot width in a homemade optical encoder disk and the slot interruptors that together form a spindle position encoder on either my lathe or my larger mill. So LCNC knows where in the spindles rotation that it is, 268 times per turn. But since time is of the essence, and I have no base-thread, the servo-thread runs at 4x the normal rate of 1 millisecond, or 250 microseconds so I effectively have for spindle speed control, a 1 millisecond to fully update the encoder velocity update, but much ( 75% theoretically) of the mechanical errors such as a photo-interruptor out of place so the quadrature timeing is off a couple degrees from a perfect 90, or the slot width is such that the duty cycle is 52%on/48% off. That computer has the 'iron' to do that on the mill, but thats pushing the slower D525MW board running the lathe. > From: Gene Heskett <[email protected]> > To: [email protected] > Sent: Wednesday, April 27, 2016 6:54 PM > Subject: Re: [Emc-users] Need to add a faster thread base-thread with > 100 microseconds, Compilation changes required !!! > > On Wednesday 27 April 2016 12:12:22 adit bhargava wrote: > > Hello Andy, > > > > I checked the pins 4 and 17 on the 5i25 header, but there is no > > output.We do have a full set of wires connected to parallel port > > cable.I don't know how to proceed now. > > > > BRÁdit > > In case you missed the read of the docs, those GPIO's so created are > inputs. So to use as outputs, you need to add some hal file lines that > turn them into outputs. > > An example from my mills .hal file might be helpfull: > ============================================ > #************************************************* > # First - setup 5i25's p3-p17 for servo enable use > #************************************************* > setp hm2_5i25.0.gpio.007.is_output true > setp hm2_5i25.0.gpio.007.invert_output false > net spindle-enable <= motion.spindle-on => boot.spindle.enable > net spindle-enable => hm2_5i25.0.gpio.007.out # pwmgen-enable on P3-17 > ============================================ > This signal serves as the enabling input to one of the Pico Systems > PWM-Servo amplifiers that I am using as the spindle motor driver, a > 1HP rated PM DC motor, from a 125 volt DC source good for about 2KW in > ICAS. 1500 watts CCS. This enable signal is used because the PWMGEN > facility in the 5i25 does not supply that enabling signal to the > outputs, it only supply's the PWM and DIR. > > The boot.spindle.enable is a module that goes with the PWM-Servo and > it issues both fwd and reverse pulses to the PWM-Servo to properly > pre-charge the output hexfets gate driving working voltages. They are > so short the motor never moves but they do the job. You do not see its > additional hal "wiring" in the above snippet as it contributes nothing > to this lesson. > > The same I assume must be done in order to use P3-pin 4, you'll need > to get the GPIO numbers from the dmesg after running LCNC as their is > little to zero relationship between the p2|3 pin number and the 3 > digit GPIO numbers you see above. The above is mine, get yours for > the corresponding pin, like p3-17 FROM your dmesg output. They will > be consistent from run to run as long as the hal files loadrt line > remains the same, and you don't mesaflash a different configuration > into the 5i25. > > I hope this helps? > > Cheers, Gene Heskett Cheers, Gene Heskett -- "There are four boxes to be used in defense of liberty: soap, ballot, jury, and ammo. Please use in that order." -Ed Howdershelt (Author) Genes Web page <http://geneslinuxbox.net:6309/gene> ------------------------------------------------------------------------------ Find and fix application performance issues faster with Applications Manager Applications Manager provides deep performance insights into multiple tiers of your business applications. It resolves application problems quickly and reduces your MTTR. Get your free trial! https://ad.doubleclick.net/ddm/clk/302982198;130105516;z _______________________________________________ Emc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-users
