2017-04-06 22:43 GMT+03:00 Peter C. Wallace:

>
> As far as I can tell from the source the svst1_4_7i47S does put stepgen 0
> at
> TX4,TX5 Stepgen 1 at TX6,TX7, stepgen 2 at TX0,TX1 and stepgen 3 at TX2,TX3
>

Right! That's what I observed.
Err... now I see that it's in the manual, J1 pinout.. Sorry.

Another question: what is different about 7i80hd_16_svst1_4_7i47s*d*.bit ?

Thanks
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