Ok, I figured out my problem with the regular encoders.
I failed to see the fourth column in the ModuleID table is the
number of instances:
(QcountTag, x"02", ClockLowTag, x"07",
QcounterAddr&PadT, QCounterNumRegs,x"00", QCounterMPBitMask),
works now.
I'm curious about the new 'inm' module though. Is this
implemented purely in the hostmot2 driver source, rather
than in the fpga? I find no mention of 'inm' in any vhdl source.
I would assume it just uses NullTag gpio pins then.
Thanks again,
-- Ralph
________________________________________
From: Peter C. Wallace [p...@mesanet.com]
Sent: Monday, March 8, 2021 6:24 AM
To: Enhanced Machine Controller (EMC)
Subject: Re: [Emc-users] Muxed encoder counters vs regular encoder counters
On Mon, 8 Mar 2021, Ralph Stirling wrote:
> Date: Mon, 8 Mar 2021 05:07:15 +0000
> From: Ralph Stirling <ralph.stirl...@wallawalla.edu>
> Reply-To: "Enhanced Machine Controller (EMC)"
> <emc-users@lists.sourceforge.net>
> To: "emc-users@lists.sourceforge.net" <emc-users@lists.sourceforge.net>
> Subject: [Emc-users] Muxed encoder counters vs regular encoder counters
>
> I am making a custom configuration to replace a Fagor 8050
> cnc control with Linuxcnc and a Mesa 7i80hd or other triple
> 2x25 header interface. I have four servo channels, and three
> mpg wheels for jogging. There only seems to be four regular
> encoder channels, and beyond that muxed counters are required.
> I don't see just how the muxed counters work, however. Can
> the two types be mixed? I see in various PIN source files a
> mux selection pin. How is this used? Here are the relevant
> lines from the vhd file:
>
> IOPortTag & x"00" & MuxedQCountTag & MuxedQCountQAPin,
> -- I/O 24
> IOPortTag & x"00" & MuxedQCountTag & MuxedQCountQBPin,
> -- I/O 25
> IOPortTag & x"01" & MuxedQCountTag & MuxedQCountQAPin,
> -- I/O 26
> IOPortTag & x"01" & MuxedQCountTag & MuxedQCountQBPin,
> -- I/O 27
> IOPortTag & x"02" & MuxedQCountTag & MuxedQCountQAPin,
> -- I/O 28
> IOPortTag & x"02" & MuxedQCountTag & MuxedQCountQBPin,
> -- I/O 29
> IOPortTag & x"00" & MuxedQCountSelTag & MuxedQCountSel0Pin,
> -- I/O 30
>
>
> Thanks again,
> -- Ralph
>
You can have as many regular encoders as desired (until 64 or you run out of
FPGA pins)
Muxed encoder save pins by multiplexing the even/odd A,B,Z signals on single
pins, so a FPGA pin A0 caries the A signal for counter 0 when the muxed select
pin is low and the A signal for counter 1 when the select pin is high. Typically
the muxed select pin switches at 6 or 8 MHz so the encoder sample rate is 3 or 4
MHz. Daughterboards with muxed encoders use the output enable lines of the
RS-422 recievers to select whether the even or odd encoder input drives the
FPGA.
Currently you cannot mix muxed and normal encoders in the same configuration (a
driver limitation) but you can use all muxed encoders in a situation where you
have muxed and non-muxed hardware (it just wastes encoders as you get an aliased
encoder with duplicated data when a muxed encoder FPGA pin is used on non-muxed
hardware)
For MPGs I would suggest using the inm module as this provides 4 MPG inputs
that have the 1x mode thats typically desired for MPGs to get one motion
increment per MPG detent (this requires 2.8.1 or >)
>
> _______________________________________________
> Emc-users mailing list
> Emc-users@lists.sourceforge.net
>
Peter Wallace
Mesa Electronics
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