On Tuesday 09 March 2021 22:36:18 dave engvall wrote: > Hi all, > I'm trying to get an Rpi4b -> 7i90 going. > > Ralph Stirling made an interface board for the pi that allows one to > flash the spi. > > The following is copy of the procedure: > > > On Rpi: > > $ git clone git://git.code.sf.net/p/openocd/code openocd > $ cd openocd > $ ./bootstrap > $ ./configure --enable-maintainer-mode --enable-bcm2835gpio > --enable-sysfsgpio > $ make -j4 > $ sudo make install > > Go into Raspbian Setup from the application menu, and turn off SPI > device driver. Openocd has a builtin driver. > > Use the openocd_rpi.sh script to load bitstreams via jtag > into the FPGA itself. This is not permanent, so you need > to follow this with mesaflash to put it in the EEPROM. > > $openocd_rpi.sh whatever_spi_bitstream.bit > > Now go back in to Raspbian Setup and turn on the SPI driver. You can > now use mesaflash to flash the EEPROM. > > $ sudo mesaflash --device 7i90 --addr /dev/spidev0.0 --spi --write > whatever_spi_bitstream.bit > > I don't recall whether SPI needs to be enabled or disabled > after this for hostmot2 to run in linuxcnc, but it is easy > enough to try each way. > > Ha! Not quite. > > Google gives hits but none of them go deep enough to fix my problems. > > Clearly this is set up for bcm2835 eg. Rpi3b however just editing the > bcm numbers to Rpi4b 2711 doesn't work. > Deeper changes are clearly needed. > Can anyone supply the relevant files for bcm2711? > > Comments and guidance appreciated. > > Dave > > file: rpi_jtag.cfg > interface bcm2835gpio > bcm2835gpio_peripheral_base 0x3F000000 > > # Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET > # These depend on system clock, calibrated for stock 700MHz > # bcm2835gpio_speed SPEED_COEFF SPEED_OFFSET > bcm2835gpio_speed_coeffs 146203 36 > > # Each of the JTAG lines need a gpio number set: tck tms tdi tdo > ## Header pin numbers: 23 22 19 21 > #bcm2835gpio_jtag_nums 11 25 10 9 > # Header pin numbers: 11 13 15 29 > bcm2835gpio_jtag_nums 17 27 22 5
Never fooled with jtag, so I don't know. But if you have a linux pc with a working epp parport, mesaflash can put the firmware into the fpga using the pc and a parport cable. The right firmware converts the parport 26 pin header on the 7i90 into an spi interface, so without a reset procedure described in the docs you will not be able read it back out on the pc. Then you need to stop the raspbian spi driver forever, then make from a board link I've sent, the adapter that connects to the header on the pi, and gives you the 26 pin socket for a jumper cable that plugs into the header socket the adapter puts on the pi. Very short jumper, mine might be an inch long. That means the jumper isn't long enough to twist so the pi is mounted on tall standoffs, upside down, with an old video card fan under it, running on the 5 volts running the pi. your hal file should loadrt the rpspi.so driver. Ping me again when you have done that. ISTR I had to add a 10 pf cap on one of the spi lines on thebottom of the pi3, if needed I can send a pix. But lets do this in sequence. > > file: openocd_rpi.sh > #!/bin/bash > > openocd \ > -f /usr/local/share/openocd/scripts/interface/rpi_jtag.cfg \ > -f /usr/local/share/openocd/scripts/cpld/xilinx-xc6s.cfg \ > -c "adapter driver rpi_jtag ; adapter speed 500; init; \ > xc6s_program xc6s.tap; pld load 0 $1 ; exit" > > Stick that in a file, chmod +x it and see if it works! > > > > > > _______________________________________________ > Emc-users mailing list > Emc-users@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/emc-users Cheers, Gene Heskett -- "There are four boxes to be used in defense of liberty: soap, ballot, jury, and ammo. Please use in that order." -Ed Howdershelt (Author) If we desire respect for the law, we must first make the law respectable. - Louis D. Brandeis Genes Web page <http://geneslinuxbox.net:6309/gene> _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
