On Wed, 2 Feb 2022, Thaddeus Waldner wrote:
Date: Wed, 2 Feb 2022 15:45:16 -0600
From: Thaddeus Waldner <thadw...@gmail.com>
Reply-To: "Enhanced Machine Controller (EMC)"
<emc-users@lists.sourceforge.net>
To: "Enhanced Machine Controller (EMC)" <emc-users@lists.sourceforge.net>
Subject: Re: [Emc-users] Stepper PID
> I suspect that you are not using the DPLL, or that it is not setup properly.
For a RPI4 I would suggest these settings:
setp hm2_7i76e.0.dpll.01.timer-us -200
set hm2_7i76e.0.stepgen.timer-number 1
These should reduce the stepgenb position sampling jitter to a
fraction of 1 usec.
Thank you, Peter. I will check and see what the configuration looks like later
when I get home. Is there any documentation on how this works? Also, what are
the implications of increasing the dpll timer period? If I can get away with
2ms
servo loop, should I set this to 400us?
No, the DPLL sample time setting is determined by jitter
statistics (average delay shifts = delay baseline drift),
not thread period.
If you change this value you should add it to the PID loops
FF2 parameter. This will compensate for the added delay between
the position read and velocity write. For -200 usec you would use
an added FF2 value of 0.0002 (PID values are scaled in seconds)
Peter Wallace
Mesa Electronics
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