On Fri, 14 Oct 2011 23:19:21 -0700 Jim Kukunas <james.t.kuku...@linux.intel.com> wrote:
> On Sat, Oct 15, 2011 at 03:52:55PM +1000, David Seikel wrote: > > On Sat, 15 Oct 2011 16:13:07 +1100 Jochen Schröder > > <cycoma...@gmail.com> wrote: > > > > > On 10/15/2011 01:37 PM, Carsten Haitzler (The Rasterman) wrote: > > > > On Fri, 14 Oct 2011 16:16:44 -0700 Jim Kukunas > > > > <james.t.kuku...@linux.intel.com> said: > > > > > > > >> On Sat, Oct 15, 2011 at 12:54:00AM +0200, Tom Hacohen wrote: > > > >>> On 14/10/11 19:20, Jim Kukunas wrote: > > > >>>> What is your compiler version and CFLAGS? > > > >>>> > > > >>>> The parameters to _mm_set_epi32 look reasonable. The only > > > >>>> reason I could imagine this failing is if your compiler > > > >>>> isn't aligning things properly. > > > >>> > > > >>> It's the sse3 issue all over again. As you can see, his CPU > > > >>> doesn't support sse3 but sse3 code is called. > > > >> > > > >> His CPU does support SSE3, hence the ``pni'' in > > > >> his /proc/cpuinfo. > > > > > > > > let's eliminate first shall we. > > > > > > > > tomas - can you either --disable-cpu-sse3 when configuring > > > > evas, OR set EVAS_CPU_NO_SSE3=1 as an env var before running e > > > > to see if this is sse3 stuff or not or a more generic problem. > > > > > > > I assume you mean me not Tomas, as I reported the segfault. This > > > was on my PC at work so it will have to wait until Monday. This > > > is a Core 2 Duo, which AFAIK does support SSE3 (wikipedia says > > > SSE3 was introduced with Prescott). > > > > It did say "ssse3" in your flags, just not straight after "sse2", > > it's two lines further down. > > > > > flags : fpu vme de pse tsc msr pae mce cx8 apic sep > > > mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss > > > ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts > > > rep_good nopl aperfmperf pni dtes64 monitor ds_cpl vmx smx est > > > tm2 ssse3 cx16 xtpr pdcm lahf_lm dts tpr_shadow vnmi flexpriority > > > > Dunno about that extra 's' though. > > ssse3 != sse3. > > ssse3 adds instructions like palignr and horizontal operations. > > > > > For what it's worth, mine says "sse4a" later in the flags after > > "sse2", but no "sse3". > > sse3 is represented by ``pni'' in /proc/cpuinfo. No wonder there is some confusion. lol -- A big old stinking pile of genius that no one wants coz there are too many silver coated monkeys in the world.
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