Hi Andreas,

Thanks for your reply.

Which document page no 27 you are referring? May you send me that document or 
location of same?

Regards,
Yogesh


________________________________
From: [email protected] 
[mailto:[email protected]] On Behalf Of Andreas Stewering-Bone
Sent: Thursday, May 19, 2011 12:46 PM
To: [email protected]
Subject: Re: [etherlab-users] [PATNI] Regarding DC Synchronisation

Hello Yogesh,

you have to notice following steps:

- If you want to do DC, you have to use a RT-kernel and a RT-application, 
because jitter on the base system can be a sync problem.

- Do not use NTP on the system, use CLOCK_MONOTONIC or CLOCK_MONOTONIC_RAW if 
accessible to get a stable clocksource.

- Get system time just before you set the application time, to get the correct 
time.

- Sync slaves every transmit cycle.

- Rise up the cycle freq, the DC syncs better if you have faster transmit cycles

- your  second question: see doc under page 27- >  watch -n0 "ethercat reg read 
-p4 -tsm32 0x92c"



Best regards

Andreas

Am 19.05.2011 08:59, schrieb Dhake, Yogesh:

Hi,
EtherCAT master performs DC synchronization as below:
Initially EtherCAT master calculates Propagation delay time between slaves.
Time Delay calculated (actual frame send from Master state machine - 
application start time) and deducted from System Time read from slave. New 
Offset time (new offset = old offset from slave + time difference between 
Master Application Start Time and Slave System Time) is send to slaves.
After this, Master sends synchronization datagram (with command FRMW-First READ 
MULTIPLE WRITE) to reference clock slave as well as to other EtherCAT slaves on 
network.
FRMW command reads reference clock slave system time (lower 32 bit) (0x0910 to 
0x0927) and writes to lower 32 bit of other EtherCAT slave system time register 
(0x0910 to 0x0927).
Activity number 2 to 4 happens at every 10ms in user application.
Our observation is difference between master time and slave system time is 
around 16-20 seconds after step 2.
Slave System Time is not accessible to us for checking whether Slave System 
Time synchronized with Master Application Time.


Our query is:
How can we reduce difference between Master Application Time and Slave System 
Time in step 2?
How to check System Time register of BECKHOFF slave after step 4?

Please let us know your valuable inputs regarding synchronization of 
Distributed clocks of EtherCAT slaves.

Please find attached DC synchronization process. Rename file to .png type.

Regards,
Yogesh

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Information contained and transmitted by this e-mail is confidential and 
proprietary to iGATE Patni and its affiliates and is intended for use only by 
the recipient. If you are not the intended recipient, you are hereby notified 
that any dissemination, distribution, copying or use of this e-mail is strictly 
prohibited and you are requested to delete this e-mail immediately and notify 
the originator or [email protected]. iGATE Patni does not enter into any 
agreement with any party by e-mail. Any views expressed by an individual do not 
necessarily reflect the view of iGATE Patni. iGATE Patni is not responsible for 
the consequences of any actions taken on the basis of information provided, 
through this email. The contents of an attachment to this e-mail may contain 
software viruses, which could damage your own computer system. While iGATE 
Patni has taken every reasonable precaution to minimise this risk, we cannot 
accept liability for any damage which you sustain as a result of software 
viruses. You should carry out your own virus checks before opening an 
attachment. To know more about iGATE Patni please visit www.igatepatni.com.
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