You have to write a little state machine (or budget equivalent using flags), to keep track of which step in the process you’re up to.
I hope you’re not confusing register requests with process data. Process data can be read and written in a single cycle. Register requests (and other request types) require multiple cycles. Gavin Lambert Senior Software Developer [cid:logo_compac_5dcf97ef-52f5-498c-8b9b-728410ddffaf.png] [cid:compacicon_82e8a8c7-154a-4a32-9720-a5badb6258e0.png]<http://www.compacsort.com> [cid:facebook_fa85b924-53b9-45cc-8162-0564f64ec3a3.png] <https://www.facebook.com/Compacsort> [cid:linkedin_4ec016ad-84fa-443c-85a3-b9615a4ccef8.png] <https://www.linkedin.com/company/compac-sorting-equipment/> [cid:youtube_32142163-fc27-4aed-b14d-e8a377f98a6d.png] <https://vimeo.com/compacsort> [cid:twitter_d89338d8-98c8-4b65-9a9e-7b1333160b0d.png] <https://twitter.com/compacsort> COMPAC SORTING EQUIPMENT LTD | 4 Henderson Pl | Onehunga | Auckland 1061 | New Zealand Switchboard: +64 96 34 00 88 | tomra.com<http://www.tomra.com> The information contained in this communication and any attachment is confidential and may be legally privileged. It should only be read by the person(s) to whom it is addressed. If you have received this communication in error, please notify the sender and delete the communication. From: Shiva V M C <[email protected]> Sent: Thursday, 14 February 2019 15:52 To: Gavin Lambert <[email protected]> Subject: Re: [etherlab-users] Userspace application. Hi Gavin Can you please help me with a mentioned set of statements in a flow for writing value to a register and then reading again from the same register. Thanks in advance On Thu, 14 Feb, 2019, 3:50 AM Gavin Lambert <[email protected]<mailto:[email protected]> wrote: That’s not how you do register requests. For a write request, you first call ecrt_reg_request_data() to get a pointer and then write the data to be written into that buffer. Then you call ecrt_reg_request_write() once to start the request. The request occurs asynchronously in the background and you have to call ecrt_reg_request_state() once per cycle to tell when it is completed. You must not try to start another read or write or alter the data in the write buffer until after the request has completed (with success or failure). Reads are similar; you call ecrt_reg_request_read() once to start the request, then ecrt_reg_request_state() once per cycle until it reports success (or failure) and only then read the resulting data out of the ecrt_reg_request_data() buffer. Both operations may take an arbitrary number of cycles to complete, since they can be queued behind other requests. You can start a read and write in the same cycle but only on separate request objects, and they will get queued anyway so there’s not much point. You absolutely should not try to sleep in the cyclic loop – the only sleep allowed in there is the “main” sleep to wait for the next cycle. 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It should only be read by the person(s) to whom it is addressed. If you have received this communication in error, please notify the sender and delete the communication. From: etherlab-users <[email protected]<mailto:[email protected]>> On Behalf Of Shiva V M C Sent: Thursday, 14 February 2019 00:59 To: [email protected]<mailto:[email protected]> Subject: [etherlab-users] Userspace application. Hi all, I have done with my user space application and I m able to run the application too. Now I want to perform 2 exercise i.e., 1.ecrt_reg_request_write(); 2.ecrt_reg_request_read(); I m able to read the particular register,but couldn't able to write on any of the register. So,could any one help me whats happening?. This is my code snippet. #define DigInSlavePos 0, 0 #define Beckhoff_EL1240 0x00000002, 0x02312862 I m doing this before activating master, if(!(sc_dig_in = ecrt_master_slave_config(master,DigInSlavePos,Beckhoff_EL1240))) { fprintf(stderr, "Failed to configure BeckHoff Salve.\n"); return -1; } regis=ecrt_slave_config_create_reg_request(sc_dig_in,127); Then called cyclic_task as below void cyclic_task() { ec_reg_request *regis; ecrt_master_receive(master); ecrt_domain_process(domain1); check_domain1_state(); //optional if (counter) counter--; else { counter = FREQUENCY; blink = !blink; check_master_state(); //optional check_slave_config_states(); //optional; ecrt_reg_request_write(regis,0xf80, 64); sleep(1); ecrt_reg_request_read(regis,0xf80, 64); // send process data ecrt_domain_queue(domain1); ecrt_master_send(master); } } -- Thanks & Regards Shiva V M C 09880153358
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