Hi, David,
Thanks for the bug report. Indeed the bitwise logical operations neglected to check the sizes of incoming bit vectors properly. The code was originally intended for operations on bitvectors of the same size, therefore does not have the proper check for sizes. This problem should have been fixed now. Please download the nightly snapshot later tonight -- the snapshot seems to be generated every night at around 3AM pacific time. The url for the nightly snapshot is <https://codeforge.lbl.gov/snapshots.php?group_id=44>. The function ibis::bitvector::setSize has been renamed ibis::bitvector::sloppySize to reflect the fact it is not intended for changing the number of bits represented by the bit vector object. For that purpose, use the function adjustSize. Please feel free to contact us if you have additional questions. John On 8/17/2009 10:17 AM, REYNOLDS David wrote: > I’ve found what I believe to be some bugs. So far, they are in very > small vectors with different sizes, in the context of logical > operations. These bugs seem to disappear when I change the size of one > of the smaller vector so the sizes are the same (by setting a 0-bit on > the smaller one at location size(largerone)-1). > > > > I also see an anomaly in the behavior of setSize in a very small vector > (the iterator is not consistent with the size as set). Also, setting > the smaller one to the same size as the larger one through setSize() > does not correct the problems of the logical operators discussed above – > I have to set the sizes the same through the method I mentioned above. > > > > It is very easy to reproduce these bugs and I provide code below. > > > > Let me know what you think. The bug(s) are in ibis1.1.1 as well as > ibis1.1.2. > > > > Regards, > > > > -David > > > > BUG REPRODUCTION. > > > > Below is the output of the attached program, which exhibits the bugs. > Underneath that is the source code which produces this output. > > > > > > Case 1 -- BUG in OR, small vectors, different sizes > > a :0 1 > > b :1 > > a|=b :0 1 > > expect :1 1 > > > > > > Case 2 -- BUG in AND, small vectors, different sizes > > a :0 1 > > b :1 > > a&=b :0 1 > > expect :0 0 > > > > > > Case 3 Bug in setSize() -- small vector size not consistent with iterator > > b.size()= 2 > > b :1 > > expect :1 0 > > > > > > Case 1 but same sizes, set with setBit OK > > a :0 1 > > b :1 0 > > a|=b :1 1 > > expect :1 1 > > > > > > ---------------- > > SOURCE CODE > > ---------------- > > > > > > #include "ibis.h" // FastBit IBIS primary include file > > > > static void writeBits( const char* label, const ibis::bitvector& bv){ > > // just print the vector as 0s & 1s in sequence. > > std::cout << label; > > for(ibis::bitvector::const_iterator iter = bv.begin(); iter != > bv.end(); ++iter) { > > std::cout << *iter << " "; > > } > > std::cout << std::endl; > > } > > > > int main(int argc, char** argv) { > > > > { > > std::cout << "\n\nCase 1 -- BUG in OR, small vectors, different > sizes\n"; > > ibis::bitvector a; > > a.setBit(1,1); > > ibis::bitvector b; > > b.setBit(0,1); > > writeBits("a :", a); > > writeBits("b :", b); > > a |= b; > > writeBits("a|=b :", a); > > std::cout << "expect :1 1\n"; > > } > > > > { > > std::cout << "\n\nCase 2 -- BUG in AND, small vectors, different > sizes\n"; > > ibis::bitvector a; > > a.setBit(1,1); > > ibis::bitvector b; > > b.setBit(0,1); > > writeBits("a :", a); > > writeBits("b :", b); > > a &= b; > > writeBits("a&=b :", a); > > std::cout << "expect :0 0\n"; > > } > > > > { > > std::cout << "\n\nCase 3 Bug in setSize() -- small vector size not > consistent with iterator \n"; > > ibis::bitvector b; > > b.setBit(0,1); > > b.setSize(2); > > std::cout << "b.size()= " << b.size() << std::endl; > > writeBits("b :", b); > > std::cout << "expect :1 0\n"; > > } > > > > { > > std::cout << "\n\nCase 1 but same sizes, set with setBit OK\n"; > > ibis::bitvector a; > > a.setBit(1,1); > > ibis::bitvector b; > > b.setBit(0,1); > > b.setBit(1,0); > > writeBits("a :", a); > > writeBits("b :", b); > > a |= b; > > writeBits("a|=b :", a); > > std::cout << "expect :1 1\n"; > > } > > > > return 0; > > } > > > _______________________________________________ FastBit-users mailing list [email protected] https://hpcrdm.lbl.gov/cgi-bin/mailman/listinfo/fastbit-users
