On Wed, Jul 11, 2007 at 01:50:45PM +1000, Nigel Cunningham wrote:
> > actually x86-64 tickless has been in rawhide about 2 weeks, and is now
> > in this rebase for FC6/F7. Whether we roll with it for a proper update
> > depends on how it fares during it's trial in updates-testing.
> > So far the forced-hpet part was the only bit that's caused trouble
> > afaics, so with that disabled, it should be (hopefully) boring.
>
> Ah. Now I see it. I was looking for 'hz', not 'hires-timers'. I haven't
> tried
> forced hpet support yet. Am I right in thinking that's only for Intels?
> (Mine's an AMD based Mitac).
So far, yes.
+//DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_0,
+// ich_force_enable_hpet);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1,
+ ich_force_enable_hpet);
+//DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_1,
+// ich_force_enable_hpet);
+//DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_31,
+// ich_force_enable_hpet);
+//DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_1,
+// ich_force_enable_hpet);
however on some other chipsets, mainline already does force-enabling..
For example on my VIA EPIA ...
[ 28.152336] Force enabled HPET at base address 0xfed00000
Dave
--
http://www.codemonkey.org.uk
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