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commit f956c41d7b2ecb5802a24dfe158d319b71c8a95a Author: Thomas Guilbert <[email protected]> AuthorDate: Fri May 15 00:56:45 2026 +0000 Commit: michaelni <[email protected]> CommitDate: Thu Jul 2 02:49:06 2026 +0000 Guard against loop underflow This commits adds an early returns if `len <= pred_order` for RISC-V architectures, matching the logic on other architectures. --- libavcodec/riscv/flacdsp_rvv.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/libavcodec/riscv/flacdsp_rvv.S b/libavcodec/riscv/flacdsp_rvv.S index a927f188d3..0db81726f1 100644 --- a/libavcodec/riscv/flacdsp_rvv.S +++ b/libavcodec/riscv/flacdsp_rvv.S @@ -26,6 +26,7 @@ func ff_flac_lpc16_rvv, zve32x, b vsetvl zero, a2, t0 vle32.v v8, (a1) sub a4, a4, a2 + blez a4, 2f vle32.v v16, (a0) sh2add a0, a2, a0 vmv.s.x v0, zero @@ -41,7 +42,7 @@ func ff_flac_lpc16_rvv, zve32x, b sw t0, (a0) addi a0, a0, 4 bnez a4, 1b - +2: ret endfunc _______________________________________________ ffmpeg-cvslog mailing list -- [email protected] To unsubscribe send an email to [email protected]
