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commit 55bdc109a1911044d11c2a8d8b447a55f6bbe059 Author: Andreas Rheinhardt <[email protected]> AuthorDate: Thu Jul 23 15:11:19 2026 +0200 Commit: Andreas Rheinhardt <[email protected]> CommitDate: Sat Aug 1 16:50:06 2026 +0200 avcodec/x86/vc1dsp_loopfilter: Avoid unnecessary PABSW The loop filter is only active if min(a1,a2)<abs(a0) which is done via masking. Ergo the sign of min(a1,a2)-abs(a0) is known (always negative) and one does not need to use PABSW to get its absolute value. This gives a small speedup. Old benchmarks: vc1dsp.vc1_h_loop_filter4_bestcase_c: 3.1 vc1dsp.vc1_h_loop_filter4_bestcase_ssse3: 33.6 ( 0.09x) vc1dsp.vc1_h_loop_filter4_worstcase_c: 43.0 vc1dsp.vc1_h_loop_filter4_worstcase_ssse3: 33.4 ( 1.29x) vc1dsp.vc1_h_loop_filter8_bestcase_c: 6.0 vc1dsp.vc1_h_loop_filter8_bestcase_sse2: 38.4 ( 0.16x) vc1dsp.vc1_h_loop_filter8_bestcase_ssse3: 37.2 ( 0.16x) vc1dsp.vc1_h_loop_filter8_bestcase_sse4: 37.6 ( 0.16x) vc1dsp.vc1_h_loop_filter8_worstcase_c: 87.5 vc1dsp.vc1_h_loop_filter8_worstcase_sse2: 38.4 ( 2.28x) vc1dsp.vc1_h_loop_filter8_worstcase_ssse3: 37.6 ( 2.32x) vc1dsp.vc1_h_loop_filter8_worstcase_sse4: 37.6 ( 2.32x) vc1dsp.vc1_h_loop_filter16_bestcase_c: 11.7 vc1dsp.vc1_h_loop_filter16_bestcase_sse2: 42.0 ( 0.28x) vc1dsp.vc1_h_loop_filter16_bestcase_ssse3: 41.4 ( 0.28x) vc1dsp.vc1_h_loop_filter16_bestcase_sse4: 44.8 ( 0.26x) vc1dsp.vc1_h_loop_filter16_worstcase_c: 167.2 vc1dsp.vc1_h_loop_filter16_worstcase_sse2: 41.8 ( 4.00x) vc1dsp.vc1_h_loop_filter16_worstcase_ssse3: 41.7 ( 3.92x) vc1dsp.vc1_h_loop_filter16_worstcase_sse4: 45.3 ( 3.69x) vc1dsp.vc1_v_loop_filter4_bestcase_c: 3.6 vc1dsp.vc1_v_loop_filter4_bestcase_ssse3: 17.1 ( 0.21x) vc1dsp.vc1_v_loop_filter4_worstcase_c: 49.3 vc1dsp.vc1_v_loop_filter4_worstcase_ssse3: 17.0 ( 2.89x) vc1dsp.vc1_v_loop_filter8_bestcase_c: 6.3 vc1dsp.vc1_v_loop_filter8_bestcase_sse2: 17.7 ( 0.36x) vc1dsp.vc1_v_loop_filter8_bestcase_ssse3: 16.8 ( 0.38x) vc1dsp.vc1_v_loop_filter8_worstcase_c: 85.8 vc1dsp.vc1_v_loop_filter8_worstcase_sse2: 17.7 ( 4.83x) vc1dsp.vc1_v_loop_filter8_worstcase_ssse3: 16.7 ( 5.12x) vc1dsp.vc1_v_loop_filter16_bestcase_c: 12.7 vc1dsp.vc1_v_loop_filter16_bestcase_sse2: 26.4 ( 0.48x) vc1dsp.vc1_v_loop_filter16_bestcase_ssse3: 24.0 ( 0.53x) vc1dsp.vc1_v_loop_filter16_worstcase_c: 170.1 vc1dsp.vc1_v_loop_filter16_worstcase_sse2: 25.7 ( 6.63x) vc1dsp.vc1_v_loop_filter16_worstcase_ssse3: 25.2 ( 6.75x) New benchmarks: vc1dsp.vc1_h_loop_filter4_bestcase_c: 3.0 vc1dsp.vc1_h_loop_filter4_bestcase_ssse3: 32.4 ( 0.09x) vc1dsp.vc1_h_loop_filter4_worstcase_c: 42.3 vc1dsp.vc1_h_loop_filter4_worstcase_ssse3: 32.7 ( 1.29x) vc1dsp.vc1_h_loop_filter8_bestcase_c: 6.1 vc1dsp.vc1_h_loop_filter8_bestcase_sse2: 37.1 ( 0.17x) vc1dsp.vc1_h_loop_filter8_bestcase_ssse3: 36.4 ( 0.17x) vc1dsp.vc1_h_loop_filter8_bestcase_sse4: 36.6 ( 0.17x) vc1dsp.vc1_h_loop_filter8_worstcase_c: 87.2 vc1dsp.vc1_h_loop_filter8_worstcase_sse2: 36.9 ( 2.36x) vc1dsp.vc1_h_loop_filter8_worstcase_ssse3: 35.8 ( 2.35x) vc1dsp.vc1_h_loop_filter8_worstcase_sse4: 36.7 ( 2.38x) vc1dsp.vc1_h_loop_filter16_bestcase_c: 12.0 vc1dsp.vc1_h_loop_filter16_bestcase_sse2: 40.0 ( 0.30x) vc1dsp.vc1_h_loop_filter16_bestcase_ssse3: 39.8 ( 0.30x) vc1dsp.vc1_h_loop_filter16_bestcase_sse4: 44.4 ( 0.27x) vc1dsp.vc1_h_loop_filter16_worstcase_c: 166.4 vc1dsp.vc1_h_loop_filter16_worstcase_sse2: 39.9 ( 4.17x) vc1dsp.vc1_h_loop_filter16_worstcase_ssse3: 39.7 ( 4.19x) vc1dsp.vc1_h_loop_filter16_worstcase_sse4: 43.8 ( 3.80x) vc1dsp.vc1_v_loop_filter4_bestcase_c: 3.6 vc1dsp.vc1_v_loop_filter4_bestcase_ssse3: 16.3 ( 0.22x) vc1dsp.vc1_v_loop_filter4_worstcase_c: 49.3 vc1dsp.vc1_v_loop_filter4_worstcase_ssse3: 16.2 ( 3.04x) vc1dsp.vc1_v_loop_filter8_bestcase_c: 6.4 vc1dsp.vc1_v_loop_filter8_bestcase_sse2: 16.3 ( 0.39x) vc1dsp.vc1_v_loop_filter8_bestcase_ssse3: 15.8 ( 0.40x) vc1dsp.vc1_v_loop_filter8_worstcase_c: 85.7 vc1dsp.vc1_v_loop_filter8_worstcase_sse2: 16.3 ( 5.24x) vc1dsp.vc1_v_loop_filter8_worstcase_ssse3: 15.8 ( 5.42x) vc1dsp.vc1_v_loop_filter16_bestcase_c: 12.7 vc1dsp.vc1_v_loop_filter16_bestcase_sse2: 24.7 ( 0.52x) vc1dsp.vc1_v_loop_filter16_bestcase_ssse3: 22.7 ( 0.56x) vc1dsp.vc1_v_loop_filter16_worstcase_c: 169.4 vc1dsp.vc1_v_loop_filter16_worstcase_sse2: 24.1 ( 7.03x) vc1dsp.vc1_v_loop_filter16_worstcase_ssse3: 24.6 ( 6.88x) Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vc1dsp_loopfilter.asm | 68 +++++++++++++++--------------------- 1 file changed, 28 insertions(+), 40 deletions(-) diff --git a/libavcodec/x86/vc1dsp_loopfilter.asm b/libavcodec/x86/vc1dsp_loopfilter.asm index fa42864ae1..883896a3ed 100644 --- a/libavcodec/x86/vc1dsp_loopfilter.asm +++ b/libavcodec/x86/vc1dsp_loopfilter.asm @@ -74,56 +74,44 @@ SECTION .text ; %1: size ; out: m0=p0' m1=q0' %macro VC1_FILTER 1 - PABSW m4, m7 PABSW m3, m6 + movd m6, r2d PABSW m2, m5 - mova m6, m4 + PABSW m4, m7 + PSHUFLW m6, m6, 0 pminsw m3, m2 - pcmpgtw m6, m3 ; if (a2 < a0 || a1 < a0) - psubw m3, m4 - pmullw m3, [pw_5] ; 5*(a3 - a0) - PABSW m2, m3 - psraw m2, 3 ; abs(d/8) - pxor m7, m3 ; d_sign ^= a0_sign - - pxor m5, m5 - movd m3, r2d + pcmpgtw m2, m4, m3 ; if (a2 < a0 || a1 < a0) %if %1 > 4 - SPLATW m3, m3 -%else - pshufw m3, m3, 0 + punpcklqdq m6, m6 %endif - pcmpgtw m3, m4 ; if (a0 < pq) - pand m6, m3 - - mova m3, m0 - psubw m3, m1 - PABSW m4, m3 - psraw m4, 1 - pxor m3, m7 ; d_sign ^ clip_sign + pcmpgtw m6, m4 ; if (a0 < pq) + psubw m4, m3 + psubw m3, m0, m1 ; clip + pmullw m4, [pw_5] ; 5*(a0 - a3) + PABSW m5, m3 + pand m6, m2 ; if (min(a1,a2) < a0 && a0 < pq) + psraw m5, 1 ; final clip + psraw m4, 3 ; d = (5*(a0 - a3)) >> 3 + pxor m2, m2 + pminsw m4, m5 ; d = min(d, clip) psraw m3, 15 - pminsw m2, m4 ; min(d, clip) - pcmpgtw m4, m5 - pand m6, m4 ; filt3 (C return value) + pcmpgtw m5, m2 ; if (clip) + pxor m7, m3 ; a0_sign ^ clip_sign + pand m6, m5 ; filt3 (C return value) ; each set of 4 pixels is not filtered if the 3rd is not -%if mmsize==16 - pshuflw m4, m6, 0xaa + PSHUFLW m5, m6, q2222 + psraw m7, 15 ; a0_sign ^ clip_sign as mask + pand m4, m6 %if %1 > 4 - pshufhw m4, m4, 0xaa -%endif -%else - pshufw m4, m6, 0xaa + pshufhw m5, m5, q2222 %endif - pandn m3, m4 - pand m2, m6 - pand m3, m2 ; d final - - psraw m7, 15 - pxor m3, m7 - psubw m3, m7 - psubw m0, m3 - paddw m1, m3 + pxor m4, m3 + pand m5, m7 + psubw m4, m3 + pand m4, m5 + psubw m0, m4 + paddw m1, m4 packuswb m0, m0 packuswb m1, m1 %endmacro _______________________________________________ ffmpeg-cvslog mailing list -- [email protected] To unsubscribe send an email to [email protected]
