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new 88ae625e69 libswresample/aarch64: Fix sign extension in audio
conversion
88ae625e69 is described below
commit 88ae625e698d7a1c0b7dcea8d915915acda3f054
Author: Hao Chen <[email protected]>
AuthorDate: Mon Aug 17 17:26:10 2026 +0000
Commit: Martin Storsjö <[email protected]>
CommitDate: Fri Aug 21 12:27:48 2026 +0000
libswresample/aarch64: Fix sign extension in audio conversion
The channel count passed as a 32-bit register (w3) is later used
as a 64-bit register (x3) for pointer offsets without proper sign
extension, resulting in misbehavior. This commit adds an explicit
sxtw instruction to ensure the channel count is properly sign-extended.
Additionally, standardizes the use of the 32-bit w2 and w12 registers
in the core length logic across functions to prevent sign extension
issues with lengths without relying on explicit 64-bit casting, matching
expected input bounds tracking.
Signed-off-by: Hao Chen <[email protected]>
---
libswresample/aarch64/audio_convert_neon.S | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/libswresample/aarch64/audio_convert_neon.S
b/libswresample/aarch64/audio_convert_neon.S
index 6d789b16d2..cb3eeb560d 100644
--- a/libswresample/aarch64/audio_convert_neon.S
+++ b/libswresample/aarch64/audio_convert_neon.S
@@ -24,15 +24,15 @@
function swri_oldapi_conv_flt_to_s16_neon, export=1
oldapi_conv_flt_to_s16_neon:
- subs x2, x2, #8
+ subs w2, w2, #8
ld1 {v0.4s}, [x1], #16
fcvtzs v4.4s, v0.4s, #31
ld1 {v1.4s}, [x1], #16
fcvtzs v5.4s, v1.4s, #31
b.eq 3f
- ands x12, x2, #~15
+ ands w12, w2, #~15
b.eq 2f
-1: subs x12, x12, #16
+1: subs w12, w12, #16
sqrshrn v4.4h, v4.4s, #16
ld1 {v2.4s}, [x1], #16
fcvtzs v6.4s, v2.4s, #31
@@ -48,7 +48,7 @@ oldapi_conv_flt_to_s16_neon:
fcvtzs v5.4s, v1.4s, #31
st1 {v6.8h}, [x0], #16
b.ne 1b
- ands x2, x2, #15
+ ands w2, w2, #15
b.eq 3f
2: ld1 {v2.4s}, [x1], #16
sqrshrn v4.4h, v4.4s, #16
@@ -70,7 +70,7 @@ endfunc
function swri_oldapi_conv_fltp_to_s16_2ch_neon, export=1
oldapi_conv_fltp_to_s16_2ch_neon:
ldp x4, x5, [x1]
- subs x2, x2, #8
+ subs w2, w2, #8
ld1 {v0.4s}, [x4], #16
fcvtzs v4.4s, v0.4s, #31
ld1 {v1.4s}, [x4], #16
@@ -80,9 +80,9 @@ oldapi_conv_fltp_to_s16_2ch_neon:
ld1 {v3.4s}, [x5], #16
fcvtzs v7.4s, v3.4s, #31
b.eq 3f
- ands x12, x2, #~15
+ ands w12, w2, #~15
b.eq 2f
-1: subs x12, x12, #16
+1: subs w12, w12, #16
ld1 {v16.4s}, [x4], #16
fcvtzs v20.4s, v16.4s, #31
sri v6.4s, v4.4s, #16
@@ -108,7 +108,7 @@ oldapi_conv_fltp_to_s16_2ch_neon:
fcvtzs v7.4s, v3.4s, #31
st1 {v23.4s}, [x0], #16
b.ne 1b
- ands x2, x2, #15
+ ands w2, w2, #15
b.eq 3f
2: sri v6.4s, v4.4s, #16
ld1 {v0.4s}, [x4], #16
@@ -132,6 +132,7 @@ oldapi_conv_fltp_to_s16_2ch_neon:
endfunc
function swri_oldapi_conv_fltp_to_s16_nch_neon, export=1
+ sxtw x3, w3
cmp w3, #2
b.eq oldapi_conv_fltp_to_s16_2ch_neon
b.gt 1f
--
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