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new b3b3b1bfe4 avutil/aarch64/float_dsp: add NEON scalarproduct_double
b3b3b1bfe4 is described below
commit b3b3b1bfe49698a36b2dd76e1db1b5822d1fed51
Author: Patryk Darmofalski <[email protected]>
AuthorDate: Mon Oct 12 13:55:46 2026 +0200
Commit: Martin Storsjö <[email protected]>
CommitDate: Tue Nov 3 18:27:30 2026 +0000
avutil/aarch64/float_dsp: add NEON scalarproduct_double
Four accumulators, as in scalarproduct_float. Eight were not faster at len
256.
checkasm --bench on Apple M4:
scalarproduct_double_c: 80.3
scalarproduct_double_neon: 21.8 ( 3.68x)
Signed-off-by: Patryk Darmofalski <[email protected]>
---
libavutil/aarch64/float_dsp_init.c | 4 ++++
libavutil/aarch64/float_dsp_neon.S | 23 +++++++++++++++++++++++
2 files changed, 27 insertions(+)
diff --git a/libavutil/aarch64/float_dsp_init.c
b/libavutil/aarch64/float_dsp_init.c
index 4325071821..0423602303 100644
--- a/libavutil/aarch64/float_dsp_init.c
+++ b/libavutil/aarch64/float_dsp_init.c
@@ -51,12 +51,16 @@ void ff_butterflies_float_neon(float *v1, float *v2, int
len);
float ff_scalarproduct_float_neon(const float *v1, const float *v2, int len);
+double ff_scalarproduct_double_neon(const double *v1, const double *v2,
+ size_t len);
+
av_cold void ff_float_dsp_init_aarch64(AVFloatDSPContext *fdsp)
{
int cpu_flags = av_get_cpu_flags();
if (have_neon(cpu_flags)) {
fdsp->butterflies_float = ff_butterflies_float_neon;
+ fdsp->scalarproduct_double = ff_scalarproduct_double_neon;
fdsp->scalarproduct_float = ff_scalarproduct_float_neon;
fdsp->vector_dmul_scalar = ff_vector_dmul_scalar_neon;
fdsp->vector_fmul = ff_vector_fmul_neon;
diff --git a/libavutil/aarch64/float_dsp_neon.S
b/libavutil/aarch64/float_dsp_neon.S
index aa6b5189f5..d2bc4df7b8 100644
--- a/libavutil/aarch64/float_dsp_neon.S
+++ b/libavutil/aarch64/float_dsp_neon.S
@@ -233,3 +233,26 @@ function ff_scalarproduct_float_neon, export=1
faddp s0, v0.2s
ret
endfunc
+
+function ff_scalarproduct_double_neon, export=1
+ movi v0.2d, #0
+ movi v1.2d, #0
+ movi v2.2d, #0
+ movi v3.2d, #0
+1:
+ ld1 {v4.2d, v5.2d}, [x0], #32
+ ld1 {v6.2d, v7.2d}, [x1], #32
+ ld1 {v16.2d, v17.2d}, [x0], #32
+ ld1 {v18.2d, v19.2d}, [x1], #32
+ subs x2, x2, #8
+ fmla v0.2d, v4.2d, v6.2d
+ fmla v1.2d, v5.2d, v7.2d
+ fmla v2.2d, v16.2d, v18.2d
+ fmla v3.2d, v17.2d, v19.2d
+ b.gt 1b
+ fadd v0.2d, v0.2d, v1.2d
+ fadd v2.2d, v2.2d, v3.2d
+ fadd v0.2d, v0.2d, v2.2d
+ faddp d0, v0.2d
+ ret
+endfunc
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