PR #24370 opened by Martin Storsjö (mstorsjo)
URL: https://code.ffmpeg.org/FFmpeg/FFmpeg/pulls/24370
Patch URL: https://code.ffmpeg.org/FFmpeg/FFmpeg/pulls/24370.patch

We have three different SIMD implementations of crc_32_IEEE_LE;
one that uses CRC, one that uses PMULL+EOR3, and one that uses
PMULL+EOR3+CRC.

When we normally add more CPU flags progressively, we'd first
test the CRC version, then the PMULL+EOR3+CRC version, but the
PMULL+EOR3 version would end up untested, unless the machine
lacks the CRC feature.

Use the new checkasm cpu flag masking feature, added in
ffmpeg's checkasm in b59a4375acf0176efaf0152117e87c15d1e2aa90,
to allow testing these features separately.

In addition to making sure we actually test all codepaths,
this also makes it easier to benchmark all three variants.




From c5356b4bb4ca0df3043d5212b01f396249cbc64b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Martin=20Storsj=C3=B6?= <[email protected]>
Date: Fri, 4 Sep 2026 23:34:31 +0300
Subject: [PATCH] checkasm: aarch64: Test PMULL and CRC separately

We have three different SIMD implementations of crc_32_IEEE_LE;
one that uses CRC, one that uses PMULL+EOR3, and one that uses
PMULL+EOR3+CRC.

When we normally add more CPU flags progressively, we'd first
test the CRC version, then the PMULL+EOR3+CRC version, but the
PMULL+EOR3 version would end up untested, unless the machine
lacks the CRC feature.

Use the new checkasm cpu flag masking feature, added in
ffmpeg's checkasm in b59a4375acf0176efaf0152117e87c15d1e2aa90,
to allow testing these features separately.

In addition to making sure we actually test all codepaths,
this also makes it easier to benchmark all three variants.
---
 tests/checkasm/checkasm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c
index 957adc4fac..277ba1e73f 100644
--- a/tests/checkasm/checkasm.c
+++ b/tests/checkasm/checkasm.c
@@ -331,7 +331,8 @@ static const CheckasmCpuInfo cpuflags[] = {
     { "SME-I16I64", "sme_i16i64", AV_CPU_FLAG_SME_I16I64 },
     { "CRC",      "crc",      AV_CPU_FLAG_ARM_CRC },
     { "SME2",     "sme2",      AV_CPU_FLAG_SME2 },
-    { "PMULL",    "pmull_eor3", AV_CPU_FLAG_PMULL|AV_CPU_FLAG_EOR3 },
+    { "PMULL",    "pmull_eor3", AV_CPU_FLAG_PMULL|AV_CPU_FLAG_EOR3, 
AV_CPU_FLAG_ARM_CRC },
+    { "PMULL+CRC","pmull_eor3_crc", 
AV_CPU_FLAG_PMULL|AV_CPU_FLAG_EOR3|AV_CPU_FLAG_ARM_CRC },
 #elif ARCH_ARM
     { "ARMV5TE",  "armv5te",  AV_CPU_FLAG_ARMV5TE },
     { "ARMV6",    "armv6",    AV_CPU_FLAG_ARMV6 },
-- 
2.52.0

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