PR #24803 opened by Forgejo_Fairy URL: https://code.ffmpeg.org/FFmpeg/FFmpeg/pulls/24803 Patch URL: https://code.ffmpeg.org/FFmpeg/FFmpeg/pulls/24803.patch
MIPS III builds fail when the CABAC inline assembly emits unsupported `movn`/`movz` instructions. Backport Brad Smith’s master fix 9432f85830f2 from #24073 to release/5.1, replacing these instructions with equivalent branch-and-move sequences on older targets. This is a clean cherry-pick preserving the original authorship and addresses the remaining release/5.1 failure reported in #24057. Verified with GCC 12.4 targeting big-endian MIPS III: release/5.1 at 4236007b60c9 fails to assemble `libavcodec/h264_cabac.o`; the patched branch builds and passes the tests below under QEMU. Native OpenBSD was not tested. MIPS FPU assembly was disabled to isolate the separate pre-existing limitation discussed in #24073. Configuration: `./configure --enable-cross-compile --cross-prefix=mips64-linux-gnuabi64- --arch=mips64 --cpu=mips3 --target-os=linux --disable-everything --disable-autodetect --disable-mipsfpu --enable-decoder=h264 --enable-demuxer=h264 --enable-parser=h264 --enable-protocol=file,pipe --enable-muxer=framemd5,framecrc --enable-encoder=rawvideo,pcm_s16le --disable-doc --target-exec='qemu-mips64 -L /usr/mips64-linux-gnuabi64' --samples=/opt/fate-suite` Passing validation: - `make -j8 fate-cabac fate-h264-conformance-cabac_mot_fld0_full fate-h264-conformance-cabac_mot_frm0_full fate-h264-conformance-cabac_mot_mbaff0_full fate-h264-conformance-cabac_mot_picaff0_full fate-h264-conformance-cabaci3_sony_b` - `git diff --check HEAD^ HEAD` The checked bitstream reader was enabled, exercising the conditional pointer updates as well as the bypass decoding paths. From 1da07111ed08d0e805f56f0dffa287d3db5d520f Mon Sep 17 00:00:00 2001 From: Brad Smith <[email protected]> Date: Tue, 11 Aug 2026 02:54:00 -0400 Subject: [PATCH] avcodec/mips/cabac: Fix building on OpenBSD/mips64 src/libavcodec/mips/cabac.h:160:77: error: instruction requires a CPU feature not currently enabled 160 | PTR_SUBU "%[tmp1], %[c_low], %[tmp1] \n\t" | ^ <inline asm>:13:2: note: instantiated into assembly here 13 | movz $15, $13, $24 | ^ OpenBSD targets MIPS III ISA. (cherry picked from commit 9432f85830f2c0a453c6caa9f4353cef208eab8a) Assisted-by: Fairy --- libavcodec/mips/cabac.h | 43 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/libavcodec/mips/cabac.h b/libavcodec/mips/cabac.h index 39c308c7e0..48fafad410 100644 --- a/libavcodec/mips/cabac.h +++ b/libavcodec/mips/cabac.h @@ -100,7 +100,14 @@ static av_always_inline int get_cabac_inline_mips(CABACContext *c, #else "slt %[tmp0], %[c_bytestream], %[c_bytestream_end] \n\t" PTR_ADDIU "%[tmp2], %[c_bytestream], 0x02 \n\t" +#if HAVE_MIPS32R2 || HAVE_MIPS64R2 "movn %[c_bytestream], %[tmp2], %[tmp0] \n\t" +#else + "beqz %[tmp0], 2f \n\t" + " nop \n\t" + "move %[c_bytestream], %[tmp2] \n\t" + "2: \n\t" +#endif #endif "1: \n\t" : [bit]"=&r"(bit), [tmp0]"=&r"(tmp0), [tmp1]"=&r"(tmp1), [tmp2]"=&r"(tmp2), @@ -151,14 +158,29 @@ static av_always_inline int get_cabac_bypass_mips(CABACContext *c) #else "slt %[tmp0], %[c_bytestream], %[c_bytestream_end] \n\t" PTR_ADDIU "%[tmp1], %[c_bytestream], 0x02 \n\t" +#if HAVE_MIPS32R2 || HAVE_MIPS64R2 "movn %[c_bytestream], %[tmp1], %[tmp0] \n\t" +#else + "beqz %[tmp0], 2f \n\t" + " nop \n\t" + "move %[c_bytestream], %[tmp1] \n\t" + "2: \n\t" +#endif #endif "1: \n\t" PTR_SLL "%[tmp1], %[c_range], 0x11 \n\t" "slt %[tmp0], %[c_low], %[tmp1] \n\t" PTR_SUBU "%[tmp1], %[c_low], %[tmp1] \n\t" +#if HAVE_MIPS32R2 || HAVE_MIPS64R2 "movz %[res], %[one], %[tmp0] \n\t" "movz %[c_low], %[tmp1], %[tmp0] \n\t" +#else + "bnez %[tmp0], 2f \n\t" + " nop \n\t" + "move %[res], %[one] \n\t" + "move %[c_low], %[tmp1] \n\t" + "2: \n\t" +#endif : [tmp0]"=&r"(tmp0), [tmp1]"=&r"(tmp1), [res]"+&r"(res), [c_range]"+&r"(c->range), [c_low]"+&r"(c->low), [c_bytestream]"+&r"(c->bytestream) @@ -203,15 +225,36 @@ static av_always_inline int get_cabac_bypass_sign_mips(CABACContext *c, int val) #else "slt %[tmp0], %[c_bytestream], %[c_bytestream_end] \n\t" PTR_ADDIU "%[tmp1], %[c_bytestream], 0x02 \n\t" +#if HAVE_MIPS32R2 || HAVE_MIPS64R2 "movn %[c_bytestream], %[tmp1], %[tmp0] \n\t" +#else + "beqz %[tmp0], 2f \n\t" + " nop \n\t" + "move %[c_bytestream], %[tmp1] \n\t" + "2: \n\t" +#endif #endif "1: \n\t" PTR_SLL "%[tmp1], %[c_range], 0x11 \n\t" "slt %[tmp0], %[c_low], %[tmp1] \n\t" PTR_SUBU "%[tmp1], %[c_low], %[tmp1] \n\t" +#if HAVE_MIPS32R2 || HAVE_MIPS64R2 "movz %[c_low], %[tmp1], %[tmp0] \n\t" +#else + "bnez %[tmp0], 2f \n\t" + " nop \n\t" + "move %[c_low], %[tmp1] \n\t" + "2: \n\t" +#endif PTR_SUBU "%[tmp1], %[zero], %[res] \n\t" +#if HAVE_MIPS32R2 || HAVE_MIPS64R2 "movn %[res], %[tmp1], %[tmp0] \n\t" +#else + "beqz %[tmp0], 3f \n\t" + " nop \n\t" + "move %[res], %[tmp1] \n\t" + "3: \n\t" +#endif : [tmp0]"=&r"(tmp0), [tmp1]"=&r"(tmp1), [res]"+&r"(res), [c_range]"+&r"(c->range), [c_low]"+&r"(c->low), [c_bytestream]"+&r"(c->bytestream) -- 2.52.0 _______________________________________________ ffmpeg-devel mailing list -- [email protected] To unsubscribe send an email to [email protected]
