PR #25659 opened by Romain Beauxis (toots)
URL: https://code.ffmpeg.org/FFmpeg/FFmpeg/pulls/25659
Patch URL: https://code.ffmpeg.org/FFmpeg/FFmpeg/pulls/25659.patch

This PR fixes an abort in the native Opus encoder with `--assert-level=2`: 
flushing an empty raw-bit cache shifts a 32-bit value by 32. The output is 
unchanged.

It is needed by the chained Ogg Opus tests in #25657.


>From e29101fb62784ca420f704aa02448fa9b59bd2db Mon Sep 17 00:00:00 2001
From: Romain Beauxis <[email protected]>
Date: Sun, 1 Nov 2026 10:54:42 -0600
Subject: [PATCH] avcodec/opus/rc: avoid a 32-bit shift when flushing raw bits

ff_opus_rc_enc_end() pads the raw bits to a full word, which asks
ff_opus_rc_put_raw() for 32 bits when the cache is empty and shifts a
32-bit value by 32.

Use the value whole when all 32 bits fit, which writes the same output
without the undefined shift that aborts with --assert-level=2.
---
 libavcodec/opus/rc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/libavcodec/opus/rc.c b/libavcodec/opus/rc.c
index 57ac272934d..f64078af3d2 100644
--- a/libavcodec/opus/rc.c
+++ b/libavcodec/opus/rc.c
@@ -163,7 +163,7 @@ void ff_opus_rc_put_raw(OpusRangeCoder *rc, uint32_t val, 
uint32_t count)
     const int to_write = FFMIN(32 - rc->rb.cachelen, count);
 
     rc->total_bits += count;
-    rc->rb.cacheval |= av_zero_extend(val, to_write) << rc->rb.cachelen;
+    rc->rb.cacheval |= (to_write < 32 ? av_zero_extend(val, to_write) : val) 
<< rc->rb.cachelen;
     rc->rb.cachelen = (rc->rb.cachelen + to_write) % 32;
 
     if (!rc->rb.cachelen && count) {
@@ -171,7 +171,7 @@ void ff_opus_rc_put_raw(OpusRangeCoder *rc, uint32_t val, 
uint32_t count)
         rc->rb.bytes    += 4;
         rc->rb.position -= 4;
         rc->rb.cachelen = count - to_write;
-        rc->rb.cacheval = av_zero_extend(val >> to_write, rc->rb.cachelen);
+        rc->rb.cacheval = to_write < 32 ? av_zero_extend(val >> to_write, 
rc->rb.cachelen) : 0;
         av_assert0(rc->rng_cur < rc->rb.position);
     }
 }
-- 
2.54.0

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