On Wed, 2018-05-09 at 14:00 +0200, Jerome Borsboom wrote: > > > Contrary to VC-1 spec, VAAPI expects the row address of the first > > > macroblock row in the first slice to start from zero for the second > > > field in a field interlaced picture. > > > > > > Signed-off-by: Jerome Borsboom <jerome.borsboom at carpalis.nl> > > > --- > > > This patch set adds support for hardware decoding multi-slice field > > > interlaced > > > pictures. With this patch set, the SA10180 test file decodes correctly > > > with > > > VAAPI hardware acceleration. This was succesfully tested on Intel Haswell > > > platform. > > > > > > > I still see lots of artifacts for a multi-slice field interfaced VC-1 video > > on > > Coffee Lake, maybe we should fix it in the driver > > > > Thanks > > Haihao > > I suppose you also applied the second part of this patch and still see > artifacts. I cannot check for Coffee Lake, but there may be issues with > the VAAPI driver for CL platform. The patches are just a copy of the > multi-slice support for frame interlaced images, so nothing special there. > > Could you share (part of) the video you used to check on Coffee Lake so > that I can see how Haswell performs? >
I apologize that I used a video with Luma/Chroma scaling set which is not supported by the driver. I confirmed your patchset works for me with other multi-slice field interfaced VC-1 video. Thanks Haihao > > Regards, > Jerome > _______________________________________________ > ffmpeg-devel mailing list > ffmpeg-devel@ffmpeg.org > http://ffmpeg.org/mailman/listinfo/ffmpeg-devel _______________________________________________ ffmpeg-devel mailing list ffmpeg-devel@ffmpeg.org http://ffmpeg.org/mailman/listinfo/ffmpeg-devel
