Update of /cvsroot/fink/dists/10.4/stable/main/finkinfo/languages
In directory sc8-pr-cvs5.sourceforge.net:/tmp/cvs-serv29466
Added Files:
iverilog.info iverilog.patch
Log Message:
Moving iverilog-0.8.1-1001 over from unstable
--- NEW FILE: iverilog.info ---
Package: iverilog
# Remember to fix Source line as well:
Version: 0.8.1
Revision: 1001
Depends: readline5-shlibs
Provides: verilog
# bison from Xcode 1.5+Nov2004 (ver. 1.2.8) works, but some versions from
# Fink (1.875 and later, but not including 2.0) break the build.
BuildDepends: gperf, readline5, libncurses5, bison (>= 2.0)
Source: ftp://ftp.icarus.com/pub/eda/verilog/v0.8/verilog-%v.tar.gz
Source-MD5: 61ab44cbf1734acf1b1e6c4c1ed596b6
# SourceDirectory: verilog-%v
Patch: %n.patch
# Bug list:
#
# Needs testing/patch:
# * math.c shift overflow
DocFiles: <<
BUGS.txt COPYING QUICK_START.txt README.txt
attributes.txt cadpli/cadpli.txt glossary.txt ieee1364-notes.txt
ivl_target.txt ivlpp/ivlpp.txt lpm.txt macosx.txt
netlist.txt swift.txt t-dll.txt
tgt-fpga/fpga.txt tgt-vvp/README.txt:README.tgt-vvp.txt vpi.txt
vvp/README.txt:README.vvp.txt vvp/functor.txt vvp/opcodes.txt
vvp/vpi.txt:vpi-within-vvp.txt vvp/vthread.txt
xilinx-hint.txt xnf.txt xnf2pcf.sh
<<
# DocFiles found with: 'find . -name "*.txt"'
# Additional DocFiles: COPYING
# Ignored DocFiles: INSTALL cygwin.txt mingw.txt solaris/*
ConfigureParams: --mandir=%p/share/man
GCC: 4.0
CompileScript: <<
#! /bin/sh -ev
### For G3/G4:
PPC_OPT="-O3 -mcpu=750 -mtune=7400"
### For G4:
# PPC_OPT="-O3 -mcpu=7400"
### For G5: (untested)
# PPC_OPT="-O3 -mcpu=G5"
DFLT_OPT="-O3"
case "%m" in
powerpc) CFLAGS="$CFLAGS $PPC_OPT" CXXFLAGS="$CXXFLAGS $PPC_OPT"
./configure %c ;;
*) CFLAGS="$CFLAGS $DFLT_OPT" CXXFLAGS="$CXXFLAGS $DFLT_OPT"
./configure %c ;;
esac
make
<<
InstallScript: <<
make install prefix=%i mandir=%i/share/man
install -d -m 755 %i/share/doc/%n/examples/vvp
install -c -p -m 644 examples/* %i/share/doc/%n/examples
install -c -p -m 644 vvp/examples/* %i/share/doc/%n/examples/vvp
ranlib %i/lib/lib*.a
<<
Description: Icarus Verilog
DescDetail: <<
Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including XNF and EDIF netlists for synthesis,
and waveform files from simulation. It strives to be true to the
IEEE-1364 standard.
A testbench is available at http://sourceforge.net/projects/ivtest
<<
DescPort: <<
Instructions from macos.txt were followed, adapting them for the
Fink way of doing things.
<<
DescPackaging: <<
SetCXXFLAGS is used because CPPFLAGS does not appear to be honored (this
problem manifests itself as an inability to find readline/readline.h).
<<
License: GPL
Homepage: http://www.icarus.com/eda/verilog/
Maintainer: Charles Lepple <[EMAIL PROTECTED]>
--- NEW FILE: iverilog.patch ---
diff -ur verilog-0.8.bak/LineInfo.h verilog-0.8/LineInfo.h
--- verilog-0.8.bak/LineInfo.h 2003-01-16 21:49:03.000000000 -0800
+++ verilog-0.8/LineInfo.h 2005-06-13 12:10:18.000000000 -0700
@@ -24,6 +24,8 @@
# include <string>
+using namespace std;
+
/*
* This class holds line information for an internal object.
*
diff -ur verilog-0.8.bak/StringHeap.h verilog-0.8/StringHeap.h
--- verilog-0.8.bak/StringHeap.h 2004-02-18 09:11:54.000000000 -0800
+++ verilog-0.8/StringHeap.h 2005-06-13 12:03:27.000000000 -0700
@@ -25,6 +25,8 @@
# include "config.h"
# include <string>
+using namespace std;
+
class perm_string {
public:
diff -ur verilog-0.8.bak/svector.h verilog-0.8/svector.h
--- verilog-0.8.bak/svector.h 2003-07-22 19:35:44.000000000 -0700
+++ verilog-0.8/svector.h 2005-06-13 12:02:02.000000000 -0700
@@ -101,8 +101,8 @@
* Override the implementation of the above template for the string
* type parameter. The initialization to nil works different here.
*/
-inline svector<string>::svector<string>(unsigned size)
-: nitems_(size), items_(new string[size])
+template <> inline svector<std::string>::svector(unsigned size)
+: nitems_(size), items_(new std::string[size])
{
}
diff -ur verilog-0.8.bak/verinum.h verilog-0.8/verinum.h
--- verilog-0.8.bak/verinum.h 2004-02-16 22:52:55.000000000 -0800
+++ verilog-0.8/verinum.h 2005-06-13 11:57:39.000000000 -0700
@@ -31,6 +31,8 @@
class ostream;
#endif
+using namespace std;
+
/*
* Numbers in Verilog are multibit strings, where each bit has 4
* possible values: 0, 1, x or z. The verinum number is store in
diff -ur verilog-0.8.bak/verireal.h verilog-0.8/verireal.h
--- verilog-0.8.bak/verireal.h 2004-06-04 16:33:51.000000000 -0700
+++ verilog-0.8/verireal.h 2005-06-13 12:06:29.000000000 -0700
@@ -28,6 +28,8 @@
class ostream;
#endif
+using namespace std;
+
class verinum;
/*
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