Update of /cvsroot/fink/dists/10.4/unstable/main/finkinfo/languages
In directory fdv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29492
Modified Files:
iverilog-snapshot.info iverilog.info
Added Files:
iverilog08.info
Log Message:
New upstream iverilog (iverilog-0.9.1) and maintenance branch (iverilog08-0.8.7)
http://iverilog.wikia.com/wiki/Release_Notes_Icarus_Verilog_0_9
Index: iverilog.info
===================================================================
RCS file:
/cvsroot/fink/dists/10.4/unstable/main/finkinfo/languages/iverilog.info,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- iverilog.info 13 Jan 2009 05:52:30 -0000 1.7
+++ iverilog.info 23 Mar 2009 03:07:27 -0000 1.8
@@ -1,7 +1,10 @@
Package: iverilog
-# Remember to fix Source line as well:
-Version: 0.8.6
-Revision: 1001
+# Remember to fix Source line when upgrading past 0.9:
+Version: 0.9.1
+Revision: 1
+Source: ftp://ftp.icarus.com/pub/eda/verilog/v0.9/verilog-%v.tar.gz
+Source-MD5: 91e8f40d995bf5ded7b847fcc02a98bf
+
Depends: readline5-shlibs, bzip2-shlibs
Provides: verilog
Conflicts: iverilog-snapshot
@@ -13,12 +16,6 @@
# Ghostscript is needed for ps2pdf.
BuildDepends: gperf, readline5, libncurses5, bison (>= 2.0), bzip2-dev,
ghostscript
-Source: ftp://ftp.icarus.com/pub/eda/verilog/v0.8/verilog-%v.tar.gz
-Source-MD5: 281c161ac42ea1342ef8d8d6b3a1907a
-# SourceDirectory: verilog-%v
-
-# Patch: %n.patch
-
# Bug list:
#
# Needs testing/patch:
@@ -29,10 +26,10 @@
attributes.txt cadpli/cadpli.txt glossary.txt ieee1364-notes.txt
ivl_target.txt ivlpp/ivlpp.txt lpm.txt macosx.txt
netlist.txt swift.txt t-dll.txt
- tgt-fpga/fpga.txt tgt-vvp/README.txt:README.tgt-vvp.txt vpi.txt
- vvp/README.txt:README.vvp.txt vvp/functor.txt vvp/opcodes.txt
+ tgt-fpga/fpga.txt tgt-vvp/README.txt:README.tgt-vvp.txt va_math.txt vpi.txt
+ vvp/README.txt:README.vvp.txt vvp/debug.txt vvp/opcodes.txt
vvp/vpi.txt:vpi-within-vvp.txt vvp/vthread.txt
- xilinx-hint.txt xnf.txt xnf2pcf.sh
+ xilinx-hint.txt
<<
# DocFiles found with: 'find . -name "*.txt"'
@@ -80,6 +77,11 @@
IEEE-1364 standard.
A testbench is available at http://sourceforge.net/projects/ivtest
+
+This package provides the latest stable release. If you need synthesis, you may
+want to stick with the 0.8.x series in the 'iverilog08' package.
+
+You may have both this package and iverilog08 installed at the same time.
<<
DescPort: <<
--- NEW FILE: iverilog08.info ---
Package: iverilog08
# Remember to fix Source line when upgrading past 0.8:
Version: 0.8.7
Revision: 1000
Source: ftp://ftp.icarus.com/pub/eda/verilog/v0.8/verilog-%v.tar.gz
Source-MD5: af5d9f842e0f482c1b5206365258c5a0
Depends: readline5-shlibs, bzip2-shlibs
Provides: verilog
# bison from Xcode 1.5+Nov2004 (ver. 1.2.8) works, but some versions from
# Fink (1.875 and later, but not including 2.0) break the build.
#
# Ghostscript is needed for ps2pdf.
BuildDepends: gperf, readline5, libncurses5, bison (>= 2.0), bzip2-dev,
ghostscript
# Bug list:
#
# Needs testing/patch:
# * math.c shift overflow
DocFiles: <<
BUGS.txt COPYING QUICK_START.txt README.txt
attributes.txt cadpli/cadpli.txt glossary.txt ieee1364-notes.txt
ivl_target.txt ivlpp/ivlpp.txt lpm.txt macosx.txt
netlist.txt swift.txt t-dll.txt
tgt-fpga/fpga.txt tgt-vvp/README.txt:README.tgt-vvp.txt vpi.txt
vvp/README.txt:README.vvp.txt vvp/functor.txt vvp/opcodes.txt
vvp/vpi.txt:vpi-within-vvp.txt vvp/vthread.txt
xilinx-hint.txt xnf.txt xnf2pcf.sh
<<
# DocFiles found with: 'find . -name "*.txt"'
# Additional DocFiles: COPYING
# Ignored DocFiles: INSTALL cygwin.txt mingw.txt solaris/*
ConfigureParams: --mandir=%p/share/man
GCC: 4.0
CompileScript: <<
#! /bin/sh -ev
### For G3/G4:
PPC_OPT="-O3 -mcpu=750 -mtune=7400"
### For G4:
# PPC_OPT="-O3 -mcpu=7400"
### For G5: (untested)
# PPC_OPT="-O3 -mcpu=G5"
DFLT_OPT="-O3"
case "%m" in
powerpc) CFLAGS="$CFLAGS $PPC_OPT" CXXFLAGS="$CXXFLAGS $PPC_OPT"
./configure %c ;;
*) CFLAGS="$CFLAGS $DFLT_OPT" CXXFLAGS="$CXXFLAGS $DFLT_OPT"
./configure %c ;;
esac
make
<<
InstallScript: <<
make install prefix=%i mandir=%i/share/man
install -d -m 755 %i/share/doc/%n/examples/vvp
install -c -p -m 644 examples/* %i/share/doc/%n/examples
install -c -p -m 644 vvp/examples/* %i/share/doc/%n/examples/vvp
ranlib %i/lib/lib*.a
<<
Description: Icarus Verilog
DescDetail: <<
Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including XNF and EDIF netlists for synthesis,
and waveform files from simulation. It strives to be true to the
IEEE-1364 standard.
A testbench is available at http://sourceforge.net/projects/ivtest
This package provides the latest in the legacy 0.8.x tree. See the
'iverilog' or 'iverilog-snapshot' packages for the latest version, or use this
package if synthesis is not working in the later releases.
You may have both this package and iverilog08 installed at the same time. This
package installs the tools with a '-0.8' suffix; e.g. 'iverilog-0.8'.
<<
DescPort: <<
Instructions from macos.txt were followed, adapting them for the
Fink way of doing things.
<<
DescPackaging: <<
SetCXXFLAGS is used because CPPFLAGS does not appear to be honored (this
problem manifests itself as an inability to find readline/readline.h).
<<
License: GPL
Homepage: http://www.icarus.com/eda/verilog/
Maintainer: Charles Lepple <clepple+f...@ghz.cc>
Index: iverilog-snapshot.info
===================================================================
RCS file:
/cvsroot/fink/dists/10.4/unstable/main/finkinfo/languages/iverilog-snapshot.info,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- iverilog-snapshot.info 13 Jan 2009 05:52:30 -0000 1.3
+++ iverilog-snapshot.info 23 Mar 2009 03:07:27 -0000 1.4
@@ -1,7 +1,10 @@
Package: iverilog-snapshot
# Remember to fix Source line as well:
-Version: 20070421
-Revision: 1001
+Version: 20081118
+Revision: 1000
+Source: ftp://ftp.icarus.com/pub/eda/verilog/snapshots/verilog-%v.tar.gz
+Source-MD5: db61b902f777ec0587875023c9d23e63
+
Depends: readline5-shlibs, bzip2-shlibs
Provides: verilog
@@ -12,12 +15,6 @@
# Fink (1.875 and later, but not including 2.0) break the build.
BuildDepends: gperf, readline5, libncurses5, bison (>= 2.0), bzip2-dev
-Source: ftp://ftp.icarus.com/pub/eda/verilog/snapshots/verilog-%v.tar.gz
-Source-MD5: f3aa1c625e0710bdf91be09dd3f64f76
-# SourceDirectory: verilog-%v
-
-# Patch: %n.patch
-
# Bug list:
#
# Needs testing/patch:
@@ -25,13 +22,13 @@
DocFiles: <<
BUGS.txt COPYING QUICK_START.txt README.txt
- attributes.txt cadpli/cadpli.txt glossary.txt ieee1364-notes.txt
+ attributes.txt cadpli/cadpli.txt extensions.txt glossary.txt
ieee1364-notes.txt
ivl_target.txt ivlpp/ivlpp.txt lpm.txt macosx.txt
netlist.txt swift.txt t-dll.txt
- tgt-fpga/fpga.txt tgt-vvp/README.txt:README.tgt-vvp.txt vpi.txt
+ tgt-fpga/fpga.txt tgt-vvp/README.txt:README.tgt-vvp.txt va_math.txt vpi.txt
vvp/README.txt:README.vvp.txt vvp/opcodes.txt
vvp/vpi.txt:vpi-within-vvp.txt vvp/vthread.txt
- xilinx-hint.txt xnf.txt xnf2pcf.sh
+ xilinx-hint.txt
<<
# DocFiles found with: 'find . -name "*.txt"'
------------------------------------------------------------------------------
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software that enables intelligent coding and step-through debugging.
Download the free 60 day trial. http://p.sf.net/sfu/www-adobe-com
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