Hi Mike, I edit the low below for brevity.
On 10.09.2009 08:16, Spangler, Mike T wrote: > Tried 0.9.1-r710. Looks like its different, but it probably trashed the > chip. No big deal.... > > node0:~ # flashrom -V -w arima.flash > flashrom v0.9.1-r710 > Found candidate at: 00000500-00000db0 > Found coreboot table at 0x00000500. > coreboot table found at 0x500. > coreboot header(24) checksum: bbc7 table(2224) checksum: a9cd entries: 13 > Vendor ID: ARIMA, part ID: HDAMA > Found chipset "AMD AMD8111", enabling flash write... OK. > This chipset supports the following protocols: Non-SPI. > Calibrating delay loop... 654M loops per second, 100 myus = 194 us. OK. > Probing for SST SST49LF004A/B, 512 KB: probe_jedec: id1 0xbf, id2 0x60 > Lock status for 0x000000 (size 0x010000) is 00, full access > Lock status for 0x010000 (size 0x010000) is 00, full access > Lock status for 0x020000 (size 0x010000) is 00, full access > Lock status for 0x030000 (size 0x010000) is 00, full access > Lock status for 0x040000 (size 0x010000) is 00, full access > Lock status for 0x050000 (size 0x010000) is 00, full access > Lock status for 0x060000 (size 0x010000) is 00, full access > Lock status for 0x070000 (size 0x010000) is 00, full access > Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. > Flash image seems to be a legacy BIOS. Disabling checks. > Writing flash chip... Lock status for 0x000000 (size 0x010000) is 00, full > access > Lock status for 0x010000 (size 0x010000) is 00, full access > Lock status for 0x020000 (size 0x010000) is 00, full access > Lock status for 0x030000 (size 0x010000) is 00, full access > Lock status for 0x040000 (size 0x010000) is 00, full access > Lock status for 0x050000 (size 0x010000) is 00, full access > Lock status for 0x060000 (size 0x010000) is 00, full access > Lock status for 0x070000 (size 0x010000) is 00, full access > ERASE FAILED at 0x0007f000! Expected=0xff, Read=0x00, failed byte count from > 0x00070000-0x0007ffff: 0x1000 > The issue you're facing is simple, but you might have to do a bit of work to fix it. You need special handling code for the flash boot block write protection on your board, commonly called board_enable. Don't worry, we can help you with that. First, do you know how the ROM image was flashed in the first place? flashrom? flash_and_burn? lbflash? /dev/bios? That will help us find any existing source code and save us the trouble of toggling loads of GPIOs. The output of "superiotool -dV" will be useful as well. Regards, Carl-Daniel -- http://www.hailfinger.org/ _______________________________________________ flashrom mailing list flashrom@flashrom.org http://www.flashrom.org/mailman/listinfo/flashrom
