Idwer, please apply the ICH GPIO patch before applying this one. Thanks,
Luc Verhaegen.
>From 4fa04184ae450493101bf274db7bb329298f1d14 Mon Sep 17 00:00:00 2001 From: Luc Verhaegen <[email protected]> Date: Sat, 24 Oct 2009 03:19:08 +0200 Subject: [PATCH] Board match for ASRock P4i65GV. Same board enable as the Dell PowerEdge 1850: raise gpio23 on ich5r. Signed-off-by: Luc Verhaegen <[email protected]> --- board_enable.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/board_enable.c b/board_enable.c index 03930f4..19825eb 100644 --- a/board_enable.c +++ b/board_enable.c @@ -739,7 +739,9 @@ static int board_asus_p4p800(const char *name) } /** - * Suited for Dell Poweredge 1850: Intel PPGA604 + E7520 + ICH5R. + * Suited for: + * - Dell Poweredge 1850: Intel PPGA604 + E7520 + ICH5R. + * - ASRock P4i65GV: Intel Socket478 + 865GV + ICH5R. * * The GPIO number has to be in the range [16,31] according to the public Intel * 82801EB ICH5 / 82801ER ICH5R datasheet and was found by exhaustive search. @@ -1136,6 +1138,7 @@ struct board_pciid_enable board_pciid_enables[] = { /* first pci-id set [4], second pci-id set [4], coreboot id [2], vendor name board name flash enable */ {0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, "Abit", "IP35", board_abit_ip35}, {0x8086, 0x1130, 0, 0, 0x105a, 0x0d30, 0x105a, 0x4d33, "acorp", "6a815epd", "Acorp", "6A815EPD", board_acorp_6a815epd}, + {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, "ASRock", "P4i65GV", board_dell_pe_1850}, {0x1022, 0x746B, 0x1022, 0x36C0, 0, 0, 0, 0, "AGAMI", "ARUMA", "agami", "Aruma", w83627hf_gpio24_raise_2e}, {0x1106, 0x3177, 0x17F2, 0x3177, 0x1106, 0x3148, 0x17F2, 0x3148, NULL, NULL, "Albatron", "PM266A*", board_epox_ep_8k5a2}, {0x1106, 0x3205, 0x1106, 0x3205, 0x10EC, 0x8139, 0xA0A0, 0x0477, NULL, NULL, "AOpen", "vKM400Am-S", board_aopen_vkm400}, -- 1.6.0.2
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