On Sun, Dec 20, 2009 at 05:01:38PM -0800, Fraser Hanson wrote: > OK, tonight I checked out the latest flashrom from svn, patched it and > compiled it. > > I then tried to flash my bios with my original bios. > > The flash failed, as follows: > > fra...@ged:~/bios/flashrom$ sudo ./flashrom -w ../stock-bios.bin > flashrom v0.9.1-r808 > No coreboot table found. > Found chipset "NVIDIA CK804", enabling flash write... OK. > This chipset supports the following protocols: Non-SPI. > Disabling flash write protection for board "MSI K8N Neo4-F"... > ERROR: no nVidia SMBus controller found. > FAILED! > Calibrating delay loop... OK. > Found chip "PMC Pm49FL004" (512 KB, LPC,FWH) at physical address 0xfff80000. > Flash image seems to be a legacy BIOS. Disabling checks. > Writing flash chip... Programming page: ERASE FAILED at 0x00000000! > Expected=0xff, Read=0x49, failed byte count from > 0x00000000-0x0000ffff: 0x599 > ERASE FAILED! > ERASE FAILED! > FAILED! > Your flash chip is in an unknown state. > Get help on IRC at irc.freenode.net (channel #flashrom) or > mail [email protected]! > ------------------------------------------------------------------------------- > DO NOT REBOOT OR POWEROFF!
Ah, urgh, nvidia mcp gpio code is busted. Here is an updated patch. Luc Verhaegen.
>From 3b1eb5fff8a87c5973b1e0da8195e1af51bcce13 Mon Sep 17 00:00:00 2001 From: Luc Verhaegen <[email protected]> Date: Mon, 21 Dec 2009 14:09:00 +0100 Subject: [PATCH] Board: Add MSI K8N Neo4. Fix up nvidia_mcp_gpio_set while we are at it. Signed-off-by: Luc Verhaegen <[email protected]> --- board_enable.c | 15 ++++++++++++--- 1 files changed, 12 insertions(+), 3 deletions(-) diff --git a/board_enable.c b/board_enable.c index 8b5ed95..fa71818 100644 --- a/board_enable.c +++ b/board_enable.c @@ -445,10 +445,10 @@ static int nvidia_mcp_gpio_set(int gpio, int raise) return -1; } - dev = pci_dev_find_vendorclass(0x10DE, 0x0C05); + dev = pci_dev_find_vendorclass(0x10DE, 0x0601); switch (dev->device_id) { - case 0x0030: /* CK804 */ - case 0x0050: /* MCP04 */ + case 0x0030: /* MCP04 */ + case 0x0050: /* CK804 */ case 0x0060: /* MCP2 */ break; default: @@ -470,6 +470,14 @@ static int nvidia_mcp_gpio_set(int gpio, int raise) } /** + * Suited for MSI K8N Neo4: nVidia CK804. + */ +static int nvidia_mcp_gpio2_raise(const char *name) +{ + return nvidia_mcp_gpio_set(0x02, 1); +} + +/** * Suited for ASUS P5ND2-SLI Deluxe: LGA775 + nForce4 SLI + MCP04. */ static int nvidia_mcp_gpio10_raise(const char *name) @@ -1267,6 +1275,7 @@ struct board_pciid_enable board_pciid_enables[] = { {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, "MSI", "MS-6712 (KT4V)", board_msi_kt4v}, {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, "MSI", "MS-7046", intel_ich_gpio19_raise}, {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", w83627thf_gpio4_4_raise_4e}, + {0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, "MSI", "K8N Neo4-F", nvidia_mcp_gpio2_raise}, {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, "shuttle", "ak31", "Shuttle", "AK31", w836xx_memw_enable_2e}, {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, "Shuttle", "AK38N", shuttle_ak38n}, {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, "Shuttle", "FN25", board_shuttle_fn25}, -- 1.6.0.2
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