Hi,
I was adding support for the AT49F040 parallel flash chip, but have
some questions. This chip has a boot block which once locked cannot
be erased / rewritten. Should I add erase functions for both cases?
Currently the erase function handles unlocked chips only. In addition,
the datasheet specifies no command timings, is the timing something I
can infer from the read / program cycle characteristics tables?
Regards,
David
Signed-off-by: David Borg <[email protected]>
datasheet:
http://pdf1.alldatasheet.com/datasheet-pdf/view/56184/ATMEL/AT49F040.html
Index: flashchips.c
===================================================================
--- flashchips.c (revision 1145)
+++ flashchips.c (working copy)
@@ -1985,6 +1985,29 @@
},
{
+ .vendor = "Atmel",
+ .name = "AT49F040",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = ATMEL_ID,
+ .model_id = AT_49F040,
+ .total_size = 512,
+ .page_size = 512,
+ .feature_bits = FEATURE_EITHER_RESET | FEATURE_ADDR_FULL,
+ .tested = TEST_UNTESTED,
+ .probe = probe_jedec,
+ .probe_timing = TIMING_ZERO, /* Datasheet has no timing info
specified */
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {512 * 1024, 1} },
+ .block_erase = erase_chip_block_jedec,
+ }
+ },
+ .write = write_jedec_1,
+ .read = read_memmapped,
+ },
+
+ {
.vendor = "EMST",
.name = "F49B002UA",
.bustype = CHIP_BUSTYPE_PARALLEL,
Index: flashchips.h
===================================================================
--- flashchips.h (revision 1145)
+++ flashchips.h (working copy)
@@ -174,6 +174,7 @@
#define AT_49F020 0x0B
#define AT_49F002N 0x07 /* for AT49F002(N) */
#define AT_49F002NT 0x08 /* for AT49F002(N)T */
+#define AT_49F040 0x13
#define CATALYST_ID 0x31 /* Catalyst */
Index: flashchips.c
===================================================================
--- flashchips.c (revision 1145)
+++ flashchips.c (working copy)
@@ -1985,6 +1985,29 @@
},
{
+ .vendor = "Atmel",
+ .name = "AT49F040",
+ .bustype = CHIP_BUSTYPE_PARALLEL,
+ .manufacture_id = ATMEL_ID,
+ .model_id = AT_49F040,
+ .total_size = 512,
+ .page_size = 512,
+ .feature_bits = FEATURE_EITHER_RESET | FEATURE_ADDR_FULL,
+ .tested = TEST_UNTESTED,
+ .probe = probe_jedec,
+ .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {512 * 1024, 1} },
+ .block_erase = erase_chip_block_jedec,
+ }
+ },
+ .write = write_jedec_1,
+ .read = read_memmapped,
+ },
+
+ {
.vendor = "EMST",
.name = "F49B002UA",
.bustype = CHIP_BUSTYPE_PARALLEL,
Index: flashchips.h
===================================================================
--- flashchips.h (revision 1145)
+++ flashchips.h (working copy)
@@ -174,6 +174,7 @@
#define AT_49F020 0x0B
#define AT_49F002N 0x07 /* for AT49F002(N) */
#define AT_49F002NT 0x08 /* for AT49F002(N)T */
+#define AT_49F040 0x13
#define CATALYST_ID 0x31 /* Catalyst */
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