Hi,
+ case SPI_CONTROLLER_VIA:
+ ichspi_bbar = mmio_readl(ich_spibar + 0x50)& ~BBAR_MASK;
+ if (ichspi_bbar)
+ msg_pdbg("Reserved bits in BBAR not zero: 0x%04x",
+ ichspi_bbar);
+ ichspi_bbar |= minaddr;
Why or?
+ mmio_writel(ichspi_bbar, ich_spibar + 0x50);
ichspi_bbar = mmio_readl(ich_spibar + 0x50);
/* We don't have any option except complaining. */
if (ichspi_bbar != minaddr)
msg_perr("Setting BBAR failed!\n");
break;
case SPI_CONTROLLER_ICH9:
- mmio_writel(minaddr, ich_spibar + 0xA0);
+ ichspi_bbar = mmio_readl(ich_spibar + 0xA0)& ~BBAR_MASK;
+ if (ichspi_bbar)
+ msg_pdbg("Reserved bits in BBAR not zero: 0x%04x",
+ ichspi_bbar);
+ ichspi_bbar |= minaddr;
+ mmio_writel(ichspi_bbar, ich_spibar + 0xA0);
ichspi_bbar = mmio_readl(ich_spibar + 0xA0);
/* We don't have any option except complaining. */
if (ichspi_bbar != minaddr)
msg_perr("Setting BBAR failed!\n");
break;
default:
- /* Not sure if BBAR actually exists on VIA. */
- msg_pdbg("Setting BBAR is not implemented for VIA yet.\n");
+ msg_perr("Unknown chipset for BBAR setting!\n");
break;
}
}
@@ -833,6 +845,7 @@
(writearr[2]<< 8) | (writearr[3]<< 0);
switch (spi_controller) {
case SPI_CONTROLLER_ICH7:
+ case SPI_CONTROLLER_VIA:
case SPI_CONTROLLER_ICH9:
if (addr< ichspi_bbar) {
Hope it works for 0 :) (yes it seems it works)
msg_perr("%s: Address 0x%06x below allowed "
@@ -1116,17 +1129,46 @@
int via_init_spi(struct pci_dev *dev)
{
uint32_t mmio_base;
+ int i;
mmio_base = (pci_read_long(dev, 0xbc))<< 8;
msg_pdbg("MMIO base at = 0x%x\n", mmio_base);
ich_spibar = physmap("VT8237S MMIO registers", mmio_base, 0x70);
- msg_pdbg("0x6c: 0x%04x (CLOCK/DEBUG)\n",
- mmio_readw(ich_spibar + 0x6c));
-
/* Not sure if it speaks all these bus protocols. */
buses_supported = CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH |
CHIP_BUSTYPE_SPI;
spi_controller = SPI_CONTROLLER_VIA;
+
+ msg_pdbg("0x00: 0x%04x (SPIS)\n", mmio_readw(ich_spibar + 0));
+ msg_pdbg("0x02: 0x%04x (SPIC)\n", mmio_readw(ich_spibar + 2));
+ msg_pdbg("0x04: 0x%08x (SPIA)\n", mmio_readl(ich_spibar + 4));
+ for (i = 0; i< 2; i++) {
+ int offs;
+ offs = 8 + (i * 8);
+ msg_pdbg("0x%02x: 0x%08x (SPID%d)\n", offs,
+ mmio_readl(ich_spibar + offs), i);
+ msg_pdbg("0x%02x: 0x%08x (SPID%d+4)\n", offs + 4,
+ mmio_readl(ich_spibar + offs + 4), i);
+ }
+ ichspi_bbar = mmio_readl(ich_spibar + 0x50);
+ msg_pdbg("0x50: 0x%08x (BBAR)\n", ichspi_bbar);
+ msg_pdbg("0x54: 0x%04x (PREOP)\n", mmio_readw(ich_spibar + 0x54));
+ msg_pdbg("0x56: 0x%04x (OPTYPE)\n", mmio_readw(ich_spibar + 0x56));
+ msg_pdbg("0x58: 0x%08x (OPMENU)\n", mmio_readl(ich_spibar + 0x58));
+ msg_pdbg("0x5c: 0x%08x (OPMENU+4)\n", mmio_readl(ich_spibar + 0x5c));
+ for (i = 0; i< 3; i++) {
+ int offs;
+ offs = 0x60 + (i * 4);
+ msg_pdbg("0x%02x: 0x%08x (PBR%d)\n", offs,
+ mmio_readl(ich_spibar + offs), i);
+ }
+ msg_pdbg("0x6c: 0x%04x (CLOCK/DEBUG)\n",
+ mmio_readw(ich_spibar + 0x6c));
VT8237S has no bit 8, 12,13. We dont have to care about them anyway.
+ if (mmio_readw(ich_spibar)& (1<< 15)) {
+ msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n");
+ ichspi_lock = 1;
+ }
All good. Works:
Vendor ID: ASUS, part ID: M2V-MX SE
DMI string system-manufacturer: "Bochs"
DMI string system-product-name: "Bochs"
DMI string system-version: "Not Specified"
DMI string baseboard-manufacturer: ""
DMI string baseboard-product-name: ""
DMI string baseboard-version: ""
Mapping VT8237S MMIO registers at 0xfed02000, unaligned size 0x70.
DMI string chassis-type: "Other"
Found ITE Super I/O, ID 0x8712.
Found chipset "VIA VT8237S", enabling flash write... chipset PCI ID is
1106:3372, MMIO base at = 0xfed02000
0x00: 0x0014 (SPIS)
0x02: 0x4140 (SPIC)
0x04: 0x00000000 (SPIA)
0x08: 0x1320377f (SPID0)
0x0c: 0x45564948 (SPID0+4)
0x10: 0xdabb0000 (SPID1)
0x14: 0x10000000 (SPID1+4)
0x50: 0x00000000 (BBAR)
0x54: 0x5006 (PREOP)
0x56: 0x462b (OPTYPE)
0x58: 0x05ab0302 (OPMENU)
0x5c: 0xc79f0190 (OPMENU+4)
0x60: 0x00000000 (PBR0)
0x64: 0x00000000 (PBR1)
0x68: 0x00000000 (PBR2)
0x6c: 0x0000 (CLOCK/DEBUG)
Programming OPCODES...
program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190
done
OK.
Thanks,
Rudolf
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