Signed-off-by: Stefan Tauner <[email protected]>
---
ichspi.c | 45 +++++++++++++++++++++------------------------
1 files changed, 21 insertions(+), 24 deletions(-)
diff --git a/ichspi.c b/ichspi.c
index aaf4df8..ab6af18 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -155,6 +155,9 @@
/* ICH SPI configuration lock-down. May be set during chipset enabling. */
static int ichspi_lock = 0;
+/* Indicates maximum number of data bytes for each SPI transaction. */
+static int ichspi_maxdata = -1;
+
uint32_t ichspi_bbar = 0;
static void *ich_spibar = NULL;
@@ -911,37 +914,28 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset,
static int run_opcode(OPCODE op, uint32_t offset,
uint8_t datalength, uint8_t * data)
{
+ if (spi_programmer->type == SPI_CONTROLLER_NONE) {
+ msg_perr("%s: unsupported chipset\n", __func__);
+ return -1;
+ }
+
+ if (datalength > ichspi_maxdata) {
+ msg_perr("%s: Internal command size error for "
+ "opcode 0x%02x, got datalength=%i, want <=%i\n",
+ __func__, op.opcode, datalength, ichspi_maxdata);
+ return SPI_INVALID_LENGTH;
+ }
+
switch (spi_programmer->type) {
case SPI_CONTROLLER_VIA:
- if (datalength > 16) {
- msg_perr("%s: Internal command size error for "
- "opcode 0x%02x, got datalength=%i, want <=16\n",
- __func__, op.opcode, datalength);
- return SPI_INVALID_LENGTH;
- }
- return ich7_run_opcode(op, offset, datalength, data, 16);
case SPI_CONTROLLER_ICH7:
- if (datalength > 64) {
- msg_perr("%s: Internal command size error for "
- "opcode 0x%02x, got datalength=%i, want <=16\n",
- __func__, op.opcode, datalength);
- return SPI_INVALID_LENGTH;
- }
- return ich7_run_opcode(op, offset, datalength, data, 64);
+ return ich7_run_opcode(op, offset, datalength, data,
ichspi_maxdata);
case SPI_CONTROLLER_ICH9:
- if (datalength > 64) {
- msg_perr("%s: Internal command size error for "
- "opcode 0x%02x, got datalength=%i, want <=16\n",
- __func__, op.opcode, datalength);
- return SPI_INVALID_LENGTH;
- }
return ich9_run_opcode(op, offset, datalength, data);
default:
- msg_perr("%s: unsupported chipset\n", __func__);
+ /* If we ever get here, something really weird happened */
+ return -1;
}
-
- /* If we ever get here, something really weird happened */
- return -1;
}
static int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt,
@@ -1206,6 +1200,8 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void
*rcrb,
break;
}
+ ichspi_maxdata = 64;
+
/* SPIBAR is at RCRB+0x3020 for ICH[78] and RCRB+0x3800 for ICH9. */
msg_pdbg("SPIBAR = 0x%x + 0x%04x\n", base, spibar_offset);
@@ -1356,6 +1352,7 @@ int via_init_spi(struct pci_dev *dev)
/* Not sure if it speaks all these bus protocols. */
buses_supported = CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH;
register_spi_programmer(&spi_programmer_via);
+ ichspi_maxdata = 16;
msg_pdbg("0x00: 0x%04x (SPIS)\n", mmio_readw(ich_spibar + 0));
msg_pdbg("0x02: 0x%04x (SPIC)\n", mmio_readw(ich_spibar + 2));
--
1.7.1
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