Signed-off-by: Idwer Vollering <[email protected]>
Signed-off-by: Stefan Tauner <[email protected]>
---
chipset_enable.c | 12 +++++++++---
1 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/chipset_enable.c b/chipset_enable.c
index 3a2febc..5907b86 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1115,8 +1115,8 @@ const struct penable chipset_enables[] = {
{0x1106, 0x3372, OK, "VIA", "VT8237S",
enable_flash_vt8237s_spi},
{0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x},
{0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x},
- {0x1106, 0x8353, OK, "VIA", "VX800",
enable_flash_vt8237s_spi},
- {0x1106, 0x8409, OK, "VIA", "VX855", enable_flash_vt823x},
+ {0x1106, 0x8353, OK, "VIA", "VX800/VX820",
enable_flash_vt8237s_spi},
+ {0x1106, 0x8409, OK, "VIA", "VX855/VX875", enable_flash_vt823x},
{0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4},
{0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000},
{0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4},
@@ -1125,14 +1125,17 @@ const struct penable chipset_enables[] = {
{0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e},
{0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e},
{0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e},
+// {0x8086, 0x2450, NT, "Intel", "C-ICH", enable_flash_ich_4e},
/* http://download.intel.com/design/chipsets/datashts/27359901.pdf */
{0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e},
{0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e},
{0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e},
{0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e},
{0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e},
+// {0x8086, 0x24dc, NT, "Intel", "ICH5/ICH5R", enable_flash_ich_4e},
/* http://www.intel.com/assets/pdf/datasheet/252516.pdf */
{0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e},
{0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc},
{0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc},
+// {0x8086, 0x2642, NT, "Intel", "ICH6W/ICH6RW", enable_flash_ich_dc},
/* bios_cntl is at 0xdc? http://www3.intel.com/Assets/PDF/datasheet/301473.pdf,
pci id: http://cateee.net/lkddb/web-lkddb/ITCO_WDT.html */
{0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100",
enable_flash_ich_dc},
{0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7},
{0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7},
@@ -1151,10 +1154,12 @@ const struct penable chipset_enables[] = {
{0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9},
{0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9},
{0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9},
+// {0x8086, 0x3a10, NT, "Intel", "ICH10R", enable_flash_ich10}, /*
engineering sample http://pci-ids.ucw.cz/read/PC/8086/3a10 and
http://www.radisys.com/files/support_downloads/03292-00_ATCA-4500_CPM_Reference.pdf
*/
{0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10},
{0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10},
{0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10},
{0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10},
+// {0x8086, 0x3a1e, NT, "Intel", "ICH10", enable_flash_ich10}, /*
ICH10 engineering sample. http://pci-ids.ucw.cz/read/PC/8086/3a1e */
{0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10},
{0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10},
{0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10},
@@ -1176,7 +1181,8 @@ const struct penable chipset_enables[] = {
{0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4},
{0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4},
{0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4},
- {0x8086, 0x8119, OK, "Intel", "Poulsbo", enable_flash_poulsbo},
+ {0x8086, 0x8119, OK, "Intel", "SCH Poulsbo", enable_flash_poulsbo},
+// {0x8086, 0x8186, NT, "Intel", "Atom E6xx(T)/Tunnel Creek",
enable_flash_poulsbo?}, /* document number 324208 */
#endif
{},
};
--
1.7.1
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