i have added a variable to hold (i % 4) in ich_fill_data: unsigned int bite; /* offset of the current byte within a 32b word */
dunno if that makes it more or less readable? should i drop it again? besides that i think there is not much room left for improvement. and i got rid of the return values (hwseq needs a fixup to work with this). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner
>From 3cb30d6b64a095de1d9cab78d4614bd8f44164dd Mon Sep 17 00:00:00 2001 From: Stefan Tauner <[email protected]> Date: Tue, 28 Jun 2011 05:15:17 +0200 Subject: [PATCH 1/3] ichspi.c: refactor filling and reading the fdata/spid registers - add ich_fill_data to fill the chipset registers from an array - add ich_read_data to copy the data from the chipset register into an array - replace the existing code with calls to those functions Signed-off-by: Stefan Tauner <[email protected]> --- ichspi.c | 121 +++++++++++++++++++++++++++++--------------------------------- 1 files changed, 57 insertions(+), 64 deletions(-) diff --git a/ichspi.c b/ichspi.c index 99c4613..fb4184c 100644 --- a/ichspi.c +++ b/ichspi.c @@ -592,6 +592,54 @@ static void ich_set_bbar(uint32_t min_addr) msg_perr("Setting BBAR failed!\n"); } +/* Reads len bytes from the fdata/spid register into the data array. + * + * Note that using len > spi_programmer->max_data_read will return garbage or + * may even crash. + */ + static void ich_read_data(uint8_t *data, int len, int reg0_off) + { + int i; + uint32_t temp32 = 0; + + for (i = 0; i < len; i++) { + if ((i % 4) == 0) + temp32 = REGREAD32(reg0_off + i); + + data[i] = (temp32 >> ((i % 4) * 8)) & 0xff; + } +} + +/* Fills len bytes from the data array into the fdata/spid registers. + * + * Note that using len > spi_programmer->max_data_write will trash the registers + * following the data registers. + */ +static void ich_fill_data(const uint8_t *data, int len, int reg0_off) +{ + uint32_t temp32 = 0; + int i; + unsigned int bite; /* offset of the current byte within a 32b word */ + + if (len <= 0) + return; + + for (i = 0; i < len; i++) { + bite = (i % 4); + if (bite == 0) + temp32 = 0; + + temp32 |= ((uint32_t) data[i]) << (bite * 8); + + if (bite == 3) /* last byte in this 32b word */ + REGWRITE32(reg0_off + (i - bite), temp32); + } + i--; + bite = (i % 4); + if (bite != 3) /* if last byte is not on a 32b boundary write it here */ + REGWRITE32(reg0_off + (i - bite), temp32); +} + /* This function generates OPCODES from or programs OPCODES to ICH according to * the chipset's SPI configuration lock. * @@ -638,9 +686,8 @@ static int ich7_run_opcode(OPCODE op, uint32_t offset, { int write_cmd = 0; int timeout; - uint32_t temp32 = 0; + uint32_t temp32; uint16_t temp16; - uint32_t a; uint64_t opmenu; int opcode_index; @@ -664,26 +711,8 @@ static int ich7_run_opcode(OPCODE op, uint32_t offset, REGWRITE32(ICH7_REG_SPIA, (offset & 0x00FFFFFF) | temp32); /* Program data into SPID0 to N */ - if (write_cmd && (datalength != 0)) { - temp32 = 0; - for (a = 0; a < datalength; a++) { - if ((a % 4) == 0) { - temp32 = 0; - } - - temp32 |= ((uint32_t) data[a]) << ((a % 4) * 8); - - if ((a % 4) == 3) { - REGWRITE32(ICH7_REG_SPID0 + (a - (a % 4)), - temp32); - } - } - if (((a - 1) % 4) != 3) { - REGWRITE32(ICH7_REG_SPID0 + - ((a - 1) - ((a - 1) % 4)), temp32); - } - - } + if (write_cmd && (datalength != 0)) + ich_fill_data(data, datalength, ICH7_REG_SPID0); /* Assemble SPIS */ temp16 = REGREAD16(ICH7_REG_SPIS); @@ -764,17 +793,8 @@ static int ich7_run_opcode(OPCODE op, uint32_t offset, return 1; } - if ((!write_cmd) && (datalength != 0)) { - for (a = 0; a < datalength; a++) { - if ((a % 4) == 0) { - temp32 = REGREAD32(ICH7_REG_SPID0 + (a)); - } - - data[a] = - (temp32 & (((uint32_t) 0xff) << ((a % 4) * 8))) - >> ((a % 4) * 8); - } - } + if ((!write_cmd) && (datalength != 0)) + ich_read_data(data, datalength, ICH7_REG_SPID0); return 0; } @@ -785,7 +805,6 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, int write_cmd = 0; int timeout; uint32_t temp32; - uint32_t a; uint64_t opmenu; int opcode_index; @@ -810,25 +829,8 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, REGWRITE32(ICH9_REG_FADDR, (offset & 0x00FFFFFF) | temp32); /* Program data into FDATA0 to N */ - if (write_cmd && (datalength != 0)) { - temp32 = 0; - for (a = 0; a < datalength; a++) { - if ((a % 4) == 0) { - temp32 = 0; - } - - temp32 |= ((uint32_t) data[a]) << ((a % 4) * 8); - - if ((a % 4) == 3) { - REGWRITE32(ICH9_REG_FDATA0 + (a - (a % 4)), - temp32); - } - } - if (((a - 1) % 4) != 3) { - REGWRITE32(ICH9_REG_FDATA0 + - ((a - 1) - ((a - 1) % 4)), temp32); - } - } + if (write_cmd && (datalength != 0)) + ich_fill_data(data, datalength, ICH9_REG_FDATA0); /* Assemble SSFS + SSFC */ temp32 = REGREAD32(ICH9_REG_SSFS); @@ -916,17 +918,8 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, return 1; } - if ((!write_cmd) && (datalength != 0)) { - for (a = 0; a < datalength; a++) { - if ((a % 4) == 0) { - temp32 = REGREAD32(ICH9_REG_FDATA0 + (a)); - } - - data[a] = - (temp32 & (((uint32_t) 0xff) << ((a % 4) * 8))) - >> ((a % 4) * 8); - } - } + if ((!write_cmd) && (datalength != 0)) + ich_read_data(data, datalength, ICH9_REG_FDATA0); return 0; } -- 1.7.1
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