[flashrom] [PATCH 2/2] Nvidia chipset enables: refactor setting bit 0 in 0x6d

[Stefan Tauner]

This also changes semantics: previously failing to set this was interpreted as
error by enable_flash_ck804 and enable_flash_mcp55 although the output
indicates otherwise. Also, in enable_flash_nvidia_nforce2 there was no check
if settings the bit succeeds.

Signed-off-by: Stefan Tauner <stefan.tau...@student.tuwien.ac.at>
---
 chipset_enable.c |   49 ++++++++++++++++++++-----------------------------
 1 files changed, 20 insertions(+), 29 deletions(-)

diff --git a/chipset_enable.c b/chipset_enable.c
index 294007d..03ccaa2 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -784,16 +784,27 @@ static int enable_flash_sb600(struct pci_dev *dev, const 
char *name)
        return ret;
 }
 
-static int enable_flash_nvidia_nforce2(struct pci_dev *dev, const char *name)
+/* sets bit 0 in 0x6d */
+static void enable_flash_nvidia_common(struct pci_dev *dev, const char *name)
 {
-       uint8_t tmp;
+       uint8_t old, new;
 
-       rpci_write_byte(dev, 0x92, 0);
+       old = pci_read_byte(dev, 0x6d);
+       new = old | 0x01;
+       if (new == old)
+               return;
+       rpci_write_byte(dev, 0x6d, new);
 
-       tmp = pci_read_byte(dev, 0x6d);
-       tmp |= 0x01;
-       rpci_write_byte(dev, 0x6d, tmp);
+       if (pci_read_byte(dev, 0x6d) != new) {
+               msg_pinfo("Setting register 0x%x to 0x%x on %s failed "
+                         "(WARNING ONLY).\n", 0x6d, new, name);
+       }
+}
 
+static int enable_flash_nvidia_nforce2(struct pci_dev *dev, const char *name)
+{
+       rpci_write_byte(dev, 0x92, 0);
+       enable_flash_nvidia_common(dev, name);
        return 0;
 }
 
@@ -859,17 +870,7 @@ ck804_lockbits_done:
                }
        }
 
-       old = pci_read_byte(dev, 0x6d);
-       new = old | 0x01;
-       if (new == old)
-               return 0;
-       rpci_write_byte(dev, 0x6d, new);
-
-       if (pci_read_byte(dev, 0x6d) != new) {
-               msg_pinfo("Setting register 0x%x to 0x%x on %s failed "
-                         "(WARNING ONLY).\n", 0x6d, new, name);
-               return -1;
-       }
+       enable_flash_nvidia_common(dev, name);
 
        return 0;
 }
@@ -929,7 +930,7 @@ static int enable_flash_sb400(struct pci_dev *dev, const 
char *name)
 
 static int enable_flash_mcp55(struct pci_dev *dev, const char *name)
 {
-       uint8_t old, new, val;
+       uint8_t val;
        uint16_t wordval;
 
        /* Set the 0-16 MB enable bits. */
@@ -943,17 +944,7 @@ static int enable_flash_mcp55(struct pci_dev *dev, const 
char *name)
        wordval |= 0x7fff;      /* 16M */
        rpci_write_word(dev, 0x90, wordval);
 
-       old = pci_read_byte(dev, 0x6d);
-       new = old | 0x01;
-       if (new == old)
-               return 0;
-       rpci_write_byte(dev, 0x6d, new);
-
-       if (pci_read_byte(dev, 0x6d) != new) {
-               msg_pinfo("Setting register 0x%x to 0x%x on %s failed "
-                         "(WARNING ONLY).\n", 0x6d, new, name);
-               return -1;
-       }
+       enable_flash_nvidia_common(dev, name);
 
        return 0;
 }
-- 
1.7.1


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