Author: stefanct
Date: Fri Sep 21 14:46:56 2012
New Revision: 1600
URL: http://flashrom.org/trac/flashrom/changeset/1600

Log:
Add spi_block_erase_62.

This is used by the AT25F series (only?), but is generic enough to reside in 
spi25.c.
The only currently supported chip is the AT25F512B. Other members of that series
need some additional infrastructure code, hence this patch adds the erase 
function to
the AT25F512B only.

Signed-off-by: Stefan Tauner <[email protected]>
Acked-by: Stefan Tauner <[email protected]>

Modified:
   trunk/chipdrivers.h
   trunk/flashchips.c
   trunk/spi.h
   trunk/spi25.c

Modified: trunk/chipdrivers.h
==============================================================================
--- trunk/chipdrivers.h Mon Sep 17 02:40:54 2012        (r1599)
+++ trunk/chipdrivers.h Fri Sep 21 14:46:56 2012        (r1600)
@@ -40,6 +40,7 @@
 int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int 
blocklen);
 int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int 
blocklen);
 int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int 
blocklen);
+int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int 
blocklen);
 int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, unsigned int 
blocklen);
 erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode);
 int spi_chip_write_1(struct flashctx *flash, uint8_t *buf, unsigned int start, 
unsigned int len);

Modified: trunk/flashchips.c
==============================================================================
--- trunk/flashchips.c  Mon Sep 17 02:40:54 2012        (r1599)
+++ trunk/flashchips.c  Fri Sep 21 14:46:56 2012        (r1600)
@@ -1695,6 +1695,9 @@
                        }, {
                                .eraseblocks = { {64 * 1024, 1} },
                                .block_erase = spi_block_erase_c7,
+                       }, {
+                               .eraseblocks = { {64 * 1024, 1} },
+                               .block_erase = spi_block_erase_62,
                        }
                },
                .printlock      = spi_prettyprint_status_register_at25f512b,

Modified: trunk/spi.h
==============================================================================
--- trunk/spi.h Mon Sep 17 02:40:54 2012        (r1599)
+++ trunk/spi.h Fri Sep 21 14:46:56 2012        (r1600)
@@ -66,6 +66,11 @@
 #define JEDEC_CE_60_OUTSIZE    0x01
 #define JEDEC_CE_60_INSIZE     0x00
 
+/* Chip Erase 0x62 is supported by Atmel AT25F chips. */
+#define JEDEC_CE_62            0x62
+#define JEDEC_CE_62_OUTSIZE    0x01
+#define JEDEC_CE_62_INSIZE     0x00
+
 /* Chip Erase 0xc7 is supported by SST/ST/EON/Macronix chips. */
 #define JEDEC_CE_C7            0xc7
 #define JEDEC_CE_C7_OUTSIZE    0x01

Modified: trunk/spi25.c
==============================================================================
--- trunk/spi25.c       Mon Sep 17 02:40:54 2012        (r1599)
+++ trunk/spi25.c       Fri Sep 21 14:46:56 2012        (r1600)
@@ -487,6 +487,43 @@
        return 0;
 }
 
+int spi_chip_erase_62(struct flashctx *flash)
+{
+       int result;
+       struct spi_command cmds[] = {
+       {
+               .writecnt       = JEDEC_WREN_OUTSIZE,
+               .writearr       = (const unsigned char[]){ JEDEC_WREN },
+               .readcnt        = 0,
+               .readarr        = NULL,
+       }, {
+               .writecnt       = JEDEC_CE_62_OUTSIZE,
+               .writearr       = (const unsigned char[]){ JEDEC_CE_62 },
+               .readcnt        = 0,
+               .readarr        = NULL,
+       }, {
+               .writecnt       = 0,
+               .writearr       = NULL,
+               .readcnt        = 0,
+               .readarr        = NULL,
+       }};
+       
+       result = spi_send_multicommand(flash, cmds);
+       if (result) {
+               msg_cerr("%s failed during command execution\n",
+                       __func__);
+               return result;
+       }
+       /* Wait until the Write-In-Progress bit is cleared.
+        * This usually takes 2-5 s, so wait in 100 ms steps.
+        */
+       /* FIXME: We assume spi_read_status_register will never fail. */
+       while (spi_read_status_register(flash) & SPI_SR_WIP)
+               programmer_delay(100 * 1000);
+       /* FIXME: Check the status register for errors. */
+       return 0;
+}
+
 int spi_chip_erase_c7(struct flashctx *flash)
 {
        int result;
@@ -711,6 +748,16 @@
        return spi_chip_erase_60(flash);
 }
 
+int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int 
blocklen)
+{
+       if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) {
+               msg_cerr("%s called with incorrect arguments\n",
+                       __func__);
+               return -1;
+       }
+       return spi_chip_erase_62(flash);
+}
+
 int spi_block_erase_c7(struct flashctx *flash, unsigned int addr,
                       unsigned int blocklen)
 {

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