Author: stefanct Date: Sat Aug 24 01:29:23 2013 New Revision: 1718 URL: http://flashrom.org/trac/flashrom/changeset/1718
Log: Add additional error handling to pcidev_readbar() callers. This is mostly a leftover of Niklas' "remove exit call from pcidev_init" patch. While not explicitly necessary detecting errors early is usually a good idea. Signed-off-by: Niklas Söderlund <[email protected]> Signed-off-by: Stefan Tauner <[email protected]> Acked-by: Stefan Tauner <[email protected]> Modified: trunk/atahpt.c trunk/drkaiser.c trunk/gfxnvidia.c trunk/nic3com.c trunk/nicintel.c trunk/nicintel_spi.c trunk/nicnatsemi.c trunk/nicrealtek.c trunk/ogp_spi.c trunk/pcidev.c trunk/satamv.c trunk/satasii.c Modified: trunk/atahpt.c ============================================================================== --- trunk/atahpt.c Fri Aug 23 23:51:32 2013 (r1717) +++ trunk/atahpt.c Sat Aug 24 01:29:23 2013 (r1718) @@ -69,6 +69,8 @@ return 1; io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_4); + if (!io_base_addr) + return 1; /* Enable flash access. */ reg32 = pci_read_long(dev, REG_FLASH_ACCESS); Modified: trunk/drkaiser.c ============================================================================== --- trunk/drkaiser.c Fri Aug 23 23:51:32 2013 (r1717) +++ trunk/drkaiser.c Sat Aug 24 01:29:23 2013 (r1718) @@ -69,6 +69,8 @@ return 1; addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2); + if (!addr) + return 1; /* Write magic register to enable flash write. */ rpci_write_word(dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE); Modified: trunk/gfxnvidia.c ============================================================================== --- trunk/gfxnvidia.c Fri Aug 23 23:51:32 2013 (r1717) +++ trunk/gfxnvidia.c Sat Aug 24 01:29:23 2013 (r1718) @@ -90,6 +90,9 @@ return 1; io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + if (!io_base_addr) + return 1; + io_base_addr += 0x300000; msg_pinfo("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr); Modified: trunk/nic3com.c ============================================================================== --- trunk/nic3com.c Fri Aug 23 23:51:32 2013 (r1717) +++ trunk/nic3com.c Sat Aug 24 01:29:23 2013 (r1718) @@ -96,6 +96,8 @@ return 1; io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + if (!io_base_addr) + return 1; id = dev->device_id; Modified: trunk/nicintel.c ============================================================================== --- trunk/nicintel.c Fri Aug 23 23:51:32 2013 (r1717) +++ trunk/nicintel.c Sat Aug 24 01:29:23 2013 (r1718) @@ -76,12 +76,17 @@ return 1; addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2); + if (!addr) + return 1; + nicintel_bar = rphysmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); if (nicintel_bar == ERROR_PTR) return 1; addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); - /* FIXME: This is not an aligned mapping. Use 4k? */ + if (!addr) + return 1; + nicintel_control_bar = rphysmap("Intel NIC control/status reg", addr, NICINTEL_CONTROL_MEMMAP_SIZE); if (nicintel_control_bar == ERROR_PTR) return 1; Modified: trunk/nicintel_spi.c ============================================================================== --- trunk/nicintel_spi.c Fri Aug 23 23:51:32 2013 (r1717) +++ trunk/nicintel_spi.c Sat Aug 24 01:29:23 2013 (r1718) @@ -173,6 +173,9 @@ return 1; io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + if (!io_base_addr) + return 1; + nicintel_spibar = rphysmap("Intel Gigabit NIC w/ SPI flash", io_base_addr, MEMMAP_SIZE); /* Automatic restore of EECD on shutdown is not possible because EECD * does not only contain FLASH_WRITES_DISABLED|FLASH_WRITES_ENABLED, Modified: trunk/nicnatsemi.c ============================================================================== --- trunk/nicnatsemi.c Fri Aug 23 23:51:32 2013 (r1717) +++ trunk/nicnatsemi.c Sat Aug 24 01:29:23 2013 (r1718) @@ -64,6 +64,8 @@ return 1; io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + if (!io_base_addr) + return 1; /* The datasheet shows address lines MA0-MA16 in one place and MA0-MA15 * in another. My NIC has MA16 connected to A16 on the boot ROM socket Modified: trunk/nicrealtek.c ============================================================================== --- trunk/nicrealtek.c Fri Aug 23 23:51:32 2013 (r1717) +++ trunk/nicrealtek.c Sat Aug 24 01:29:23 2013 (r1718) @@ -69,6 +69,8 @@ return 1; io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + if (!io_base_addr) + return 1; /* Beware, this ignores the vendor ID! */ switch (dev->device_id) { Modified: trunk/ogp_spi.c ============================================================================== --- trunk/ogp_spi.c Fri Aug 23 23:51:32 2013 (r1717) +++ trunk/ogp_spi.c Sat Aug 24 01:29:23 2013 (r1718) @@ -131,6 +131,9 @@ return 1; io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + if (!io_base_addr) + return 1; + ogp_spibar = rphysmap("OGP registers", io_base_addr, 4096); if (ogp_spibar == ERROR_PTR) return 1; Modified: trunk/pcidev.c ============================================================================== --- trunk/pcidev.c Fri Aug 23 23:51:32 2013 (r1717) +++ trunk/pcidev.c Sat Aug 24 01:29:23 2013 (r1718) @@ -94,7 +94,7 @@ supported_cycles = pci_read_word(dev, PCI_COMMAND); - msg_pdbg("Requested BAR is "); + msg_pdbg("Requested BAR is of type "); switch (bartype) { case TYPE_MEMBAR: msg_pdbg("MEM"); Modified: trunk/satamv.c ============================================================================== --- trunk/satamv.c Fri Aug 23 23:51:32 2013 (r1717) +++ trunk/satamv.c Sat Aug 24 01:29:23 2013 (r1718) @@ -88,6 +88,9 @@ return 1; addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + if (!addr) + return 1; + mv_bar = rphysmap("Marvell 88SX7042 registers", addr, 0x20000); if (mv_bar == ERROR_PTR) return 1; @@ -136,6 +139,9 @@ /* Get I/O BAR location. */ tmp = pcidev_readbar(dev, PCI_BASE_ADDRESS_2); + if (!addr) + return 1; + /* Truncate to reachable range. * FIXME: Check if the I/O BAR is actually reachable. * This is an arch specific check. Modified: trunk/satasii.c ============================================================================== --- trunk/satasii.c Fri Aug 23 23:51:32 2013 (r1717) +++ trunk/satasii.c Sat Aug 24 01:29:23 2013 (r1718) @@ -85,9 +85,13 @@ if ((id == 0x3132) || (id == 0x3124)) { addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); + if (!addr) + return 1; reg_offset = 0x70; } else { addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_5); + if (!addr) + return 1; reg_offset = 0x50; } _______________________________________________ flashrom mailing list [email protected] http://www.flashrom.org/mailman/listinfo/flashrom
