Hi again! I tried to take off graphics and then disable all not needed devices. GPIO message persist. Tried acpi_enforce_resources=lax and acpi_enforce_resources=no kernel commands, but still nothing.
Regards! 2013/10/3 san <[email protected]> > What name of module should i look for? > > I'm trying to manipulate gpios, but getting this message: > > =============== > root@flashrom:/sys/class/gpio# echo 3 > /sys/class/gpio/export > bash: echo: write error: Invalid argument > =============== > > Might it be releated to dmesg info: > > =============== > [ 7.508264] ACPI Warning: 0x00000430-0x00000433 SystemIO conflicts with > Regio > n \SPEN 1 (20120320/utaddress-251) > [ 7.508295] ACPI: If an ACPI driver is available for this device, you > should > use it instead of the native driver > [ 7.508302] lpc_ich: Resource conflict(s) found affecting iTCO_wdt > [ 7.508320] lpc_ich 0000:00:1f.0: I/O space for GPIO uninitialized > [ 7.548511] ppdev: user-space parallel port driver > =============== > > I have no idea what to do. > GPIO uninitialised is not for this machine only. > > Just wanted to inform, ill try to find some answers, but any help would be > aprecieted. > > Is it possible we can not do anything beacose of GPIO interface problems? > > Best regards! > > > 2013/10/2 Stefan Tauner <[email protected]> > >> On Tue, 1 Oct 2013 20:39:12 +0200 >> san <[email protected]> wrote: >> >> > Hi again! >> > >> > I'm trying to "Try & Error method on GPIO pins" but not sure what to do: >> > >> > ====================== >> > san@flashrom:~$ lspci | grep ISA >> > 00:1f.0 ISA bridge: Intel Corporation 82801EB/ER (ICH5/ICH5R) LPC >> Interface >> > Bridge (rev 02) >> > ====================== >> > >> > seems to be fine, but can not find anything usefull at: >> > >> > ====================== >> > san@flashrom:~$ cat /proc/ioports >> > 0000-001f : dma1 >> > 0020-0021 : pic1 >> > 0040-0043 : timer0 >> > 0050-0053 : timer1 >> > 0060-0060 : keyboard >> > 0064-0064 : keyboard >> > 0070-0073 : rtc0 >> > 0080-008f : dma page reg >> > 00a0-00a1 : pic2 >> > 00c0-00df : dma2 >> > 00f0-00ff : fpu >> > 0170-0177 : 0000:00:1f.1 >> > 0170-0177 : ata_piix >> > 01f0-01f7 : 0000:00:1f.1 >> > 01f0-01f7 : ata_piix >> > 0294-0297 : pnp 00:01 >> > 0376-0376 : 0000:00:1f.1 >> > 0376-0376 : ata_piix >> > 0378-037a : parport0 >> > 03f2-03f2 : floppy >> > 03f4-03f5 : floppy >> > 03f6-03f6 : 0000:00:1f.1 >> > 03f6-03f6 : ata_piix >> > 03f7-03f7 : floppy >> > 03f8-03ff : serial >> > 0400-04bf : pnp 00:0a >> > 0400-0403 : ACPI PM1a_EVT_BLK >> > 0404-0405 : ACPI PM1a_CNT_BLK >> > 0408-040b : ACPI PM_TMR >> > 0428-042f : ACPI GPE0_BLK >> > 04d0-04d1 : pnp 00:01 >> > 0500-051f : 0000:00:1f.3 >> > 0a78-0a7b : pnp 00:01 >> > 0b78-0b7b : pnp 00:01 >> > 0bbc-0bbf : pnp 00:01 >> > 0cf8-0cff : PCI conf1 >> > 0e78-0e7b : pnp 00:01 >> > 0f78-0f7b : pnp 00:01 >> > 0fbc-0fbf : pnp 00:01 >> > a000-afff : PCI Bus 0000:02 >> > a000-a0ff : 0000:02:02.0 >> > a000-a0ff : 8139too >> > b000-b01f : 0000:00:1d.1 >> > b000-b01f : uhci_hcd >> > b400-b41f : 0000:00:1d.2 >> > b400-b41f : uhci_hcd >> > b800-b81f : 0000:00:1d.3 >> > b800-b81f : uhci_hcd >> > bc00-bc1f : 0000:00:1d.0 >> > bc00-bc1f : uhci_hcd >> > c000-c007 : 0000:00:1f.2 >> > c000-c007 : ata_piix >> > c400-c403 : 0000:00:1f.2 >> > c400-c403 : ata_piix >> > c800-c807 : 0000:00:1f.2 >> > c800-c807 : ata_piix >> > cc00-cc03 : 0000:00:1f.2 >> > cc00-cc03 : ata_piix >> > d000-d00f : 0000:00:1f.2 >> > d000-d00f : ata_piix >> > d800-d8ff : 0000:00:1f.5 >> > d800-d8ff : Intel ICH5 >> > dc00-dc3f : 0000:00:1f.5 >> > dc00-dc3f : Intel ICH5 >> > f000-f00f : 0000:00:1f.1 >> > f000-f00f : ata_piix >> > >> > ====================== >> >> No idea why the GPIO function is not found in the ioports... probably >> you need to load a module for it that is not loaded automatically. >> >> >> The interesting part of your binary that (probably) disables the write >> protection is disassembled here: >> http://paste.flashrom.org/view.php?id=1772 >> >> The head of the function 5E1F is done by flashrom already (setting >> BIOS_CNTL). Starting with 5E2C it calculates the offset of the GPIO >> registers mapped on PMBASE (5E77 stores a part of PMBASE in dx). >> >> So you can either continue with the trial and error method or try to >> understand the code the vendor tool would execute. >> >> -- >> Kind regards/Mit freundlichen Grüßen, Stefan Tauner >> > > > > -- > [ e-San.info | [email protected] ] > -- [ e-San.info | [email protected] ]
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