On Thu, 06 Feb 2014 00:34:21 +0100 Oskar Enoksson <[email protected]> wrote:
> I just wanted to report that all operations (read/erase/write) work fine > on SST49LF040. > > I may run an old version, but I saw there is a "?" in the table on your > website for "write" on this chip. > > # ../flashrom-0.9.2/flashrom -w build/coreboot.rom > flashrom v0.9.2-r1001 on Linux 3.4.63-2.44-desktop (x86_64), built with > libpci 2.2.3, GCC 4.1.2 20080704 (Red Hat 4.1.2-46) > flashrom is free software, get the source code at http://www.flashrom.org > > coreboot table found at 0xbffee000. > Found chipset "AMD AMD8111", enabling flash write... OK. > This chipset supports the following protocols: Non-SPI. > Calibrating delay loop... OK. > Found chip "SST SST49LF040" (512 KB, LPC) at physical address 0xfff80000. > === > This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE > The test status of this chip may have been updated in the latest development > version of flashrom. If you are running the latest development version, > please email a report to [email protected] if any of the above > operations > work correctly for you with this flash part. Please include the flashrom > output with the additional -V option for all operations you tested (-V, -Vr, > -Vw, -VE), and mention which mainboard or programmer you tested. > Thanks for your help! > === > Writing flash chip... Erasing flash chip... SUCCESS. > Programming page: DONE!ss: 0x0007f000 > COMPLETE. > Verifying flash... VERIFIED. Hello Oskar, thanks for your report! I have marked the flash chip as fully tested and will commit that later together with other small changes. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner _______________________________________________ flashrom mailing list [email protected] http://www.flashrom.org/mailman/listinfo/flashrom
