Hi Sandy,
That range is outside of what you have defined in your flash descriptor.
Can you update your flash descriptor to include it?

On Thu, Aug 10, 2017 at 4:43 AM, Sandy Zhang <sanzh...@celestica.com> wrote:

> Hi David,
>
> I have used your program to verify,  but it still can't flash, it prompts
> "Transaction error between offset 0x00ff0000 and 0x00ff003f  (= 0x00ff003f
> + 63)"!
>
>
>
>
> 2017-08-10 15:29 GMT+08:00 David Hendricks <david.hendri...@gmail.com>:
>
>> Hi Sandy,
>> Recent Intel PCHs use hardware sequencing which abstracts a lot of
>> details about the chip. So we don't actually need flashrom to explicitly
>> support the W25Q256.
>>
>> Here is a tarball based on the latest sources from git:
>> https://drive.google.com/file/d/0Bz3WBh8gVeIuSlJYZ2c1bS1LdGc
>> /view?usp=sharing
>>
>> It has the following patches applied:
>> https://review.coreboot.org/#/c/20922/ : chispet_enable: Add PCI IDs for
>> C620-series PCHs
>> https://review.coreboot.org/#/c/20936/ : ich_descriptors: Modify limits
>> for C620/Lewisburg PCH
>> https://review.coreboot.org/#/c/20937/ : ich_descriptors: Fix off-by-one
>> error
>>
>> Let us know if it works for you.
>>
>>
>> On Wed, Aug 9, 2017 at 8:04 PM, Sandy Zhang <sanzh...@celestica.com>
>> wrote:
>>
>>> Hi David,
>>>
>>> I have get the package from the web, but I can't find the code about
>>> "25Q256" in flashchip.c, so, maybe this will lead to flash fail.
>>>
>>> 2017-08-09 15:11 GMT+08:00 Sandy Zhang <sanzh...@celestica.com>:
>>>
>>>> Hi David,
>>>>
>>>> Yes, My system's ISA/LPC vendor id and device id is 8086:a1c6,
>>>> In fact, I can't access the clone https://review.coreboot.
>>>> org/flashrom.git,  I attempt to add the patch to flashrom-0.9.9, but I
>>>> found the difference is a bit big between these files, I'm very hard to add
>>>> the patch completely, so, could you send the latest package to me to try
>>>> this on my system?
>>>> Thanks for your great help!
>>>>
>>>>
>>>>
>>>>
>>>>
>>>>
>>>> 2017-08-09 14:04 GMT+08:00 David Hendricks <david.hendri...@gmail.com>:
>>>>
>>>>> Hi Sandy,
>>>>> What is the result of `lspci -nn | grep ISA` on your system? I
>>>>> uploaded a patch for Lewisburg PCI IDs here: https://review.coreboot.
>>>>> org/#/c/20922/
>>>>>
>>>>> I have tested Lewisburg PCH + W25Q256xxx and it seems to work. Let me
>>>>> know if you need any help applying the patch and testing it out on your
>>>>> system.
>>>>>
>>>>>
>>>>> On Tue, Aug 8, 2017 at 7:09 PM, Sandy Zhang <sanzh...@celestica.com>
>>>>> wrote:
>>>>>
>>>>>> Hi David,
>>>>>>
>>>>>> Do you know whether the configuration "Lewisburg PCH + W25Q256xxx
>>>>>> SPI" has been tested with the flashrom? thank you!
>>>>>>
>>>>>>
>>>>>>
>>>>>>
>>>>>>
>>>>>>
>>>>>> 2017-08-08 3:55 GMT+08:00 David Hendricks <david.hendri...@gmail.com>
>>>>>> :
>>>>>>
>>>>>>> Hi Sandy,
>>>>>>> Correct - The PCH will not allow us to write anything to regions
>>>>>>> which are not defined in the flash descriptor. You could add those 
>>>>>>> regions
>>>>>>> to the "BIOS" region if you wish to update them from your host OS. The 
>>>>>>> SPI
>>>>>>> Programming Guide for your PCH (Lewisburg?) should also have info about
>>>>>>> additional regions which you may set up in the flash descriptor.
>>>>>>>
>>>>>>> "EW" means erase and write, "S" means skip (content does not need to
>>>>>>> change), "E" means erase only, "W" means write only
>>>>>>>
>>>>>>> On Mon, Aug 7, 2017 at 12:50 AM, Sandy Zhang <sanzh...@celestica.com
>>>>>>> > wrote:
>>>>>>>
>>>>>>>> Hi David,
>>>>>>>>
>>>>>>>> It seems that the below 2 regions are "write denied":
>>>>>>>>
>>>>>>>> 00A26000       00A35FFF     00010000        DER #1 Region
>>>>>>>> 00A36000       00FEFFFF     005BA000        10 Gbe A Region
>>>>>>>>
>>>>>>>> By the way, can you tell me what is the other parament "EW", "S"
>>>>>>>> and "E" meana? thank you!
>>>>>>>>
>>>>>>>>
>>>>>>>>
>>>>>>>>
>>>>>>>> 2017-08-07 13:02 GMT+08:00 David Hendricks <
>>>>>>>> david.hendri...@gmail.com>:
>>>>>>>>
>>>>>>>>> Hi Sandy,
>>>>>>>>> It might not have done what you expect. The error is because
>>>>>>>>> offsets 0xa26000-0xffffff are not defined in the flash descriptor, so 
>>>>>>>>> the
>>>>>>>>> PCH gives us an error when flashrom attempts to update it. ":WD" next 
>>>>>>>>> to
>>>>>>>>> the offsets in the log means "write denied".
>>>>>>>>>
>>>>>>>>> If you wish to update that region of the ROM then you must change
>>>>>>>>> your flash descriptor to include it and set the permissions to enable 
>>>>>>>>> read
>>>>>>>>> and write.
>>>>>>>>>
>>>>>>>>>
>>>>>>>>> On Sun, Aug 6, 2017 at 8:20 PM, Sandy Zhang <
>>>>>>>>> sanzh...@celestica.com> wrote:
>>>>>>>>>
>>>>>>>>>> Hi David,
>>>>>>>>>>
>>>>>>>>>> Attachment is the log file when flash bios into Winbond 32MB SPI
>>>>>>>>>> rom,  could you help to check if it's updated sucessfully? thank you!
>>>>>>>>>>
>>>>>>>>>> 2017-08-05 10:45 GMT+08:00 Sandy Zhang <sanzh...@celestica.com>:
>>>>>>>>>>
>>>>>>>>>>> Hi David,
>>>>>>>>>>>
>>>>>>>>>>> Thank you very much, I will try to add the patch to flashrom-0.9.9,
>>>>>>>>>>> As a BIOS engineer, it is a bit difficult for me to complete this.
>>>>>>>>>>> Do you know when will make it into a release tarball?
>>>>>>>>>>>
>>>>>>>>>>>
>>>>>>>>>>>
>>>>>>>>>>> BR
>>>>>>>>>>> Sandy
>>>>>>>>>>>
>>>>>>>>>>> 2017-08-05 0:05 GMT+08:00 David Hendricks <
>>>>>>>>>>> david.hendri...@gmail.com>:
>>>>>>>>>>>
>>>>>>>>>>>> On Aug 3, 2017 11:51 PM, "Sandy Zhang" <sanzh...@celestica.com>
>>>>>>>>>>>> wrote:
>>>>>>>>>>>>
>>>>>>>>>>>>> Hi David,
>>>>>>>>>>>>>
>>>>>>>>>>>>> Thanks for your reply, can you tell me where to download the
>>>>>>>>>>>>> flash package like "flashrom-0.9.9.tar" which is downloaded from 
>>>>>>>>>>>>> the
>>>>>>>>>>>>> address ''https://www.flashrom.org/Downloads";?  thank you!
>>>>>>>>>>>>>
>>>>>>>>>>>>
>>>>>>>>>>>> The Skylake patches have not made it into a release tarball
>>>>>>>>>>>> yet. Can you try using the git sources from
>>>>>>>>>>>> https://review.coreboot.org/cgit/flashrom.git? E.g:
>>>>>>>>>>>>
>>>>>>>>>>>> git clone https://review.coreboot.org/flashrom.git
>>>>>>>>>>>> git checkout origin/staging
>>>>>>>>>>>> make
>>>>>>>>>>>>
>>>>>>>>>>>>
>>>>>>>>>>>>>
>>>>>>>>>>>>>
>>>>>>>>>>>>>
>>>>>>>>>>>>> BR
>>>>>>>>>>>>> Sandy
>>>>>>>>>>>>>
>>>>>>>>>>>>> 2017-08-04 14:35 GMT+08:00 David Hendricks <
>>>>>>>>>>>>> david.hendri...@gmail.com>:
>>>>>>>>>>>>>
>>>>>>>>>>>>>> Hi Sandy,
>>>>>>>>>>>>>> Skylake support was recently merged:
>>>>>>>>>>>>>> https://review.coreboot.org/18973
>>>>>>>>>>>>>>
>>>>>>>>>>>>>> However you may need to add your PCH PCI ID. What does `lspci
>>>>>>>>>>>>>> -nn | grep LPC` show on your test system?
>>>>>>>>>>>>>>
>>>>>>>>>>>>>> And yes, a 32MB ROM should work fine.
>>>>>>>>>>>>>>
>>>>>>>>>>>>>> On Mon, Jul 31, 2017 at 4:11 AM, Sandy Zhang <
>>>>>>>>>>>>>> sanzh...@celestica.com> wrote:
>>>>>>>>>>>>>>
>>>>>>>>>>>>>>> Hi,
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>> Can you tell me when flashrom support Intel Purley platform
>>>>>>>>>>>>>>> Lewisburg PCH?
>>>>>>>>>>>>>>> and if it can support flash 32 MB SPI rom?
>>>>>>>>>>>>>>>  I am eager to your reply as soon as possible, thank you
>>>>>>>>>>>>>>> very much!
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>> --
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>> *Best Regard!*
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>> *Sandy Zhang (* 张立康*)*
>>>>>>>>>>>>>>> *BIOS Engineer*
>>>>>>>>>>>>>>> *Global Design Service*
>>>>>>>>>>>>>>> *Celestica(Shanghai) R&D Center, China*
>>>>>>>>>>>>>>> *Mail: sanzh...@celestica.com <viter...@celestica.com>*
>>>>>>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>>>>>>>>>>>>> *Phone: (+86)021-61006028-7623*
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>> _______________________________________________
>>>>>>>>>>>>>>> flashrom mailing list
>>>>>>>>>>>>>>> flashrom@flashrom.org
>>>>>>>>>>>>>>> https://mail.coreboot.org/mailman/listinfo/flashrom
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>
>>>>>>>>>>>>>>
>>>>>>>>>>>>>
>>>>>>>>>>>>>
>>>>>>>>>>>>> --
>>>>>>>>>>>>>
>>>>>>>>>>>>> *Best Regard!*
>>>>>>>>>>>>>
>>>>>>>>>>>>> *Sandy Zhang (* 张立康*)*
>>>>>>>>>>>>> *BIOS Engineer*
>>>>>>>>>>>>> *Global Design Service*
>>>>>>>>>>>>> *Celestica(Shanghai) R&D Center, China*
>>>>>>>>>>>>> *Mail: sanzh...@celestica.com <viter...@celestica.com>*
>>>>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>>>>>>>>>>> *Phone: (+86)021-61006028-7623*
>>>>>>>>>>>>>
>>>>>>>>>>>>
>>>>>>>>>>>
>>>>>>>>>>>
>>>>>>>>>>> --
>>>>>>>>>>>
>>>>>>>>>>> *Best Regard!*
>>>>>>>>>>>
>>>>>>>>>>> *Sandy Zhang (* 张立康*)*
>>>>>>>>>>> *BIOS Engineer*
>>>>>>>>>>> *Global Design Service*
>>>>>>>>>>> *Celestica(Shanghai) R&D Center, China*
>>>>>>>>>>> *Mail: sanzh...@celestica.com <viter...@celestica.com>*
>>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>>>>>>>>> *Phone: (+86)021-61006028-7623*
>>>>>>>>>>>
>>>>>>>>>>
>>>>>>>>>>
>>>>>>>>>>
>>>>>>>>>> --
>>>>>>>>>>
>>>>>>>>>> *Best Regard!*
>>>>>>>>>>
>>>>>>>>>> *Sandy Zhang (* 张立康*)*
>>>>>>>>>> *BIOS Engineer*
>>>>>>>>>> *Global Design Service*
>>>>>>>>>> *Celestica(Shanghai) R&D Center, China*
>>>>>>>>>> *Mail: sanzh...@celestica.com <viter...@celestica.com>*
>>>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>>>>>>>> *Phone: (+86)021-61006028-7623*
>>>>>>>>>>
>>>>>>>>>
>>>>>>>>>
>>>>>>>>
>>>>>>>>
>>>>>>>> --
>>>>>>>>
>>>>>>>> *Best Regard!*
>>>>>>>>
>>>>>>>> *Sandy Zhang (* 张立康*)*
>>>>>>>> *BIOS Engineer*
>>>>>>>> *Global Design Service*
>>>>>>>> *Celestica(Shanghai) R&D Center, China*
>>>>>>>> *Mail: sanzh...@celestica.com <viter...@celestica.com>*
>>>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>>>>>> *Phone: (+86)021-61006028-7623*
>>>>>>>>
>>>>>>>
>>>>>>>
>>>>>>
>>>>>>
>>>>>> --
>>>>>>
>>>>>> *Best Regard!*
>>>>>>
>>>>>> *Sandy Zhang (* 张立康*)*
>>>>>> *BIOS Engineer*
>>>>>> *Global Design Service*
>>>>>> *Celestica(Shanghai) R&D Center, China*
>>>>>> *Mail: sanzh...@celestica.com <viter...@celestica.com>*
>>>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>>>> *Phone: (+86)021-61006028-7623*
>>>>>>
>>>>>
>>>>>
>>>>
>>>>
>>>> --
>>>>
>>>> *Best Regard!*
>>>>
>>>> *Sandy Zhang (* 张立康*)*
>>>> *BIOS Engineer*
>>>> *Global Design Service*
>>>> *Celestica(Shanghai) R&D Center, China*
>>>> *Mail: sanzh...@celestica.com <viter...@celestica.com>*
>>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>>> *Phone: (+86)021-61006028-7623*
>>>>
>>>
>>>
>>>
>>> --
>>>
>>> *Best Regard!*
>>>
>>> *Sandy Zhang (* 张立康*)*
>>> *BIOS Engineer*
>>> *Global Design Service*
>>> *Celestica(Shanghai) R&D Center, China*
>>> *Mail: sanzh...@celestica.com <viter...@celestica.com>*
>>> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
>>> *Phone: (+86)021-61006028-7623*
>>>
>>
>>
>
>
> --
>
> *Best Regard!*
>
> *Sandy Zhang (* 张立康*)*
> *BIOS Engineer*
> *Global Design Service*
> *Celestica(Shanghai) R&D Center, China*
> *Mail: sanzh...@celestica.com <viter...@celestica.com>*
> *Mobile: (+86)15965353952 <+86%20159%206535%203952>*
> *Phone: (+86)021-61006028-7623*
>
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