Hi Matty wrote:
Dec 12 14:37:47 bar cpu.generic: [ID 369736 kern.warning] WARNING: Machine-Check Exception in kernel mode Dec 12 14:37:47 bar cpu.generic: [ID 642271 kern.warning] WARNING: 2 STAT 0xf60000000002011a ADDR 0x000000000000474b
This is the output of the "generic" MCA support module cpu.generic that, in S10U3, would apply to all non-AMD cpus and to any AMD cpu not covered by family 0xf revisions B-E. I think the X2200 first shipped with AMD family 0xf rev F cpus, so you get the brain-dead generic MCA support with no plumbing into the FMA framework. In S10U4 AMD family 0xf rev F support was included; if you patch U3 to suitable levels (please don't ask me for patch numbers!) you'll get that support. When S10U5 ships it will include an improved level of generic x86 MCA support that is plumbed into the FMA framework for diagnosis etc. This will mean that a new cpu model is available, say the quadcore AMD family 0x10, that we don't fallback to braindead generic support in the absence of full model-specific support, but instead to a decent level of generic support. The same code supports all recent Intel offerings. Due to a mis-step on Pentium 3's we have, for S10U5, decided to enable this improved generic support only for "recent" AMD and Intel cpu models - pre K8 AMD, Pentium 4 and earlier from Intel, and any non AMD or Intel (e.g., Via) will still use the brain-dead stuff you see above. There is a tuneable that will enable all to the same level as in current Nevada bits, and in S10U6 we'll flip that tuneable for all. Cheers Gavin
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