On Mar 3, 2009, at 8:13 PM, Srihari Venkatesan wrote:
Hi Gavin,
Gavin Maltby wrote:
Gavin Maltby wrote:
Hi Tom,
Tom Pothier wrote:
Currently we plan to use the PRI to only enumerate to the base
board level; then call chip.so to enumerate chip/core/strand and
memory topology.
... but chip.so relies on the hacky xml and enumerator method
trick to
write FRU labels for CPU and DIMM - would we be able to elimanate
that?
OK, I think the PRI would go to the chip level and then chip.so
would add the core and strand hierarchy below.
So what of memory topology - would that still be enumerated based
on info provided by a memory-controller driver, or instead
be sourced from SMBIOS/other info?
The plan is to get the information from memory controller driver
(to let chip.so get all the detail as it does today), and update
chip.so
(with checks for SMBIOS-catered-FMA) - to add valid property
information like serial number, part number to the topology nodes
of chip.so using SMBIOS (libsmbios)
-Srihari
Am I correct in assuming that "with checks for SMBIOS-catered-FMA"
also means that SMBIOS is the fallback on a platform that lacks a mc
driver?
/dale
Gavin
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