Nikolay Suslov wrote: > Just to mention, that Thacker's "BEE" FPGA is not another hardware > project, but the emulation engine, where Fleet (the novel processor > architecture) is being researched and emulated. >
A box packed full of FPGAs capable of 4 teraops/second isn't a hardware project? I beg to differ. :-) One of the target use-cases for the BEE is indeed to simulate new processor architectures. However, that's not all it's for. Among other things, the beecube.com webpage says that it can be used for "FPGA based computational acceleration in HPC" and "High performance digital signal processing". Cheers, Josh > Regards, > Nikolay > > On Sun, Jul 26, 2009 at 12:40 AM, Joshua Gargus <[email protected] > <mailto:[email protected]>> wrote: > > I just noticed this: http://fleet.cs.berkeley.edu/ > > It seems relevant to this list both because it's an ambitious > re-imagining of the foundations of processor architecture, and because > of the intellectual heritage between Ivan and Alan. I know that > VPRI is > keeping an eye on other hardware projects, like Thacker's "BEE" FPGA > boxes, and I wonder how relevant Sutherland's work might be to > VPRI in, > say, 1 or 5 years? > > Cheers, > Josh > > > > _______________________________________________ > fonc mailing list > [email protected] <mailto:[email protected]> > http://vpri.org/mailman/listinfo/fonc > > > ------------------------------------------------------------------------ > > _______________________________________________ > fonc mailing list > [email protected] > http://vpri.org/mailman/listinfo/fonc >
_______________________________________________ fonc mailing list [email protected] http://vpri.org/mailman/listinfo/fonc
