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Pat, The problem I have is why X matters at all at the ATA/ATAPI level. There are two interfaces here - one is from bridge to host (I'll assume USB, but the principle applies elsewhere), the other is the bridge to the device (I'll assume ATAPI). If the bridge is the ATAPI receiver (you earlier mentioned that the bridge as ATAPI sender is not an issue), then it gets the bytes from the device. There may be an odd byte issue here. But the (X+2) issue is another matter. If the bridge knows, as the ATAPI receiver, how many bytes it wants (say R), then it just sends those to the host via the USB interface. Basically, so what is another (X+2) bytes are still in the bridge from the recently completed DMA burst? These are just the first (X+2) bytes from the next DMA burst, so when that finally happens the bridge just appends the data from the next burst to the (X_2) caught in the FIFO (actually, this is what would have happened anyway). This process can be continued indefinitely, until the last DMA burst from the sender. At that point there is no (X+2) residue since the command is not over and the device (the sender) knows that, and does not send more data. Indeed, the odd byte problem is not an issue for any of these DMA bursts either until the very last one. If this means that the last byte of one block is in the same word as the first byte of the next block then so be it. There is no requirement to align DMA bursts on block boundaries, but there is a requirement to transfer correct user data. Thus, as I earlier asserted, you only need at most a single bit indicator read by the bridge at the end of a command - nothing more. Jim -----Original Message----- From: Pat LaVarre [mailto:[EMAIL PROTECTED]] Sent: Monday, December 10, 2001 8:20 AM To: [EMAIL PROTECTED] Subject: [t13] non-communication of non-whole-block residue In case it got lost in the flurry Friday, I'm going to restate now the one technical point on which I imagine we wall want to achieve consensus, no matter how we all then agree to disagree over the most profitable business models. Please tell me that and how I'm wrong? I think there is no dispute over: Given N * 2 as the count of bytes the receiver and the sender of clocks mutually agree clocked across the bus, given R as the count of bytes the receiver of clocks means to transfer, (N * 2 - R) may be as large as (X * 2 + 1). The question being debated is how large is (X * 2 + 1) in practice. To say the non-communication of non-whole-block residue is only ever an issue for odd byte counts is to claim max X is always 0. Me, I think see a max X of 2 in UDma 33, rising with increasing burst rate. Whatever max X truly is, this is a real issue for block transfers whenever the block size is less than ((max X) * 2 + 2), thus an issue for non-whole-block transfers generally. Please tell me that and how I'm wrong? Thanks again in advance. Pat LaVarre Subscribe/Unsubscribe instructions can be found at www.t13.org.
