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I think my previous email basically covers this but... On Mon, 10 Dec 2001 10:23:49 -0700, Pat LaVarre wrote: >Any fully transparent Usb/AtapiUDma bridge will do exactly this on occasion. >The bridge will send too many clocks any time its host tells it >only how many bytes of buffer for data out were allocated, rather >than the smaller number of bytes that should pass thru. Then this is a broken "host"... BAD HOST! Attempting to write more data to a device in PIO mode generally results in PIO writes to the Data register that are, if you are lucky, ignored by the device. Attempting to read more data from a device in PIO mode generally results in PIO reads of the data register that return indeterminate data values. Either way the ATA/ATAPI host is a BAD HOST and it is violating the ATA and/or ATAPI command protocols. >The receiver of clocks won't get a chance to halt the traffic >until after (X * 2 + 1) too many bytes have clocked across the >bus. If you are talking about a write command using DMA then I would fully expect the device to terminate the burst once it has all the data it wants (and yes, that may mean the device receives a few extra pad bytes is should count in the CRC for the burst but otherwise ignore). Then the device will proceed to complete the command without asking for another DMA burst and the result could be a hung host (a host that thinks more data will be transferred and is not expecting the device to end the command). *** Hale Landis *** [EMAIL PROTECTED] *** *** Niwot, CO USA *** www.ata-atapi.com *** Subscribe/Unsubscribe instructions can be found at www.t13.org.
