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I might be wrong but I think part of Pat's concern is how to handle data transfers through x-to-ATA/ATAPI bridge devices. Pat: Is this correct? A bridge device has no easy job and these things can not be simple little chunks of hardware. These things need some smarts, maybe they don't need a microprocessor but they do need some fancy state machines. Lets try an example... Note: Here again we will show that the size of DMA data bursts has nothing to do with the size of device media data blocks. Lets look at the data transfer part of a Read 10 command for 4 blocks of 512 bytes each, a total 2048 bytes. This command is passed through a x-to-ATA/ATAPI bridge device where DMA is used on the ATA/ATAPI side. Lets assume the ATAPI device, for what ever reasons, never transfers more than 400 bytes in a DMA data burst... Note that the x-to-ATA/ATAPI bridge has no control over the size of the DMA data burst generated by the device. Of course the bridge can force the device to send DMA data bursts of much less than 400 bytes. Lets assume that on the x side the x-to-ATA/ATAPI bridge is restricted to data transfer packets of 256 bytes so a total of 8 data packets are required on the x interface. ===begin The Read 10 command is passed to the device. The bridge prepares to transfer data and waits for DMARQ from the device. It sees DMARQ and responds with DMACK and off we go transferring the first DMA data burst... Dev: Device sends 200 bytes in the 1st DMA data burst. Br: The bridge has received a total of 200 bytes. Total x side packets so far: 0, bytes waiting: 200. Dev: Device sends 400 bytes in the 2nd DMA data burst. Br: The bridge has received a total of 600 bytes. Total x side packets so far: 2, bytes waiting: (600-(2*256)). Dev: Device sends 200 bytes in the 3rd DMA data burst. Br: The bridge has received a total of 800 bytes, Total x side packets so far: 3, bytes waiting (800-(3*256)). Dev: For whatever reason the device has no more data to send for awhile. Br: The bridge has send all x side data packets. Total x side packets so far: 3, bytes waiting (800-(3*256)). Dev: Device sends 400 bytes in the 4th DMA data burst. Br: The bridge has received a total of 1200 bytes. Total x side packets so far: 4, bytes waiting (1200-(4*256)). Dev: Device sends 400 bytes in the 5th DMA data burst. Br: The bridge has received a total of 1600 bytes. Total x side packets so far: 6, bytes waiting (1600-(6*256)). Dev: Device sends 400 bytes in the 6th DMA data burst. Br: The bridge has received a total of 2000 bytes. Total x side packets so far: 7, bytes waiting (2000-(7*256)). Dev: Device sends last 48 bytes in 7th DMA data burst. Br: The bridge has received 2048 bytes. Total x side packets: 8, bytes remaining (2048-(8*256)). ===end Pat: Where are the "extra" data bytes? *** Hale Landis *** www.ata-atapi.com *** Subscribe/Unsubscribe instructions can be found at www.t13.org.
