This message is from the T13 list server.
On Fri, 12 Apr 2002 12:19:00 -0600, Pat LaVarre wrote: >This message is from the T13 list server. >Residue accurate to the byte is a competitive advantage held by AtapiPio, >generic Usb Mass, classic fully-handshaked parallel Scsi ... Atapi Dma allows >reporting residue, but the accuracy diminishes with burst rate. What is this "residue"? I just don't understand what you are talking about. I've described how ATA/ATAPI expect write and read (PIO and DMA) commands to be executed. And there are no "residues". Never/ever. The only thing that is possible is a read command (PIO or DMA) where the device supplies less data than the SCSI CDB allows or the receiver expects. Can anyone else explain what/where this "residue" is? Maybe if someone explained it using different words or a different example I would understand. >> ALL ODD TRANSFERS WILL >> BE ROUNDED UP TO THE NEXT EVEN VALUE. >This is just not true. All ATA interface data transfers (except in the rare case of 8-bit CFA) are a multiple of 16-bits. Therefore all data transfers are a multiple of two bytes, therefore all transfers are for a even number of data bytes. ATA/ATAPI handles the SCSI CDB that wants to transfer an odd number of byte by appending a "pad" byte to the end of the transfer (as documented in SFF-8020 and in ATA/ATAPI-x). Again, I just don't know what you are talking about. >Microsoft Win95B AtapiPio crashes if you try an odd length transfer. >Microsoft Win98 AtapiPio copies the odd length no worries. I imagine, though >I haven't checked lately, that the follow-on Win versions retained this fix. >Within Atapi, it's only AtapiDma that rounds up an odd length. Yes 2 * N >blocks clock across the bus even in AtapiPio. But AtapiPio reports the >residue in advance of the transfer, thus leaving the host is free to choose to >access an extra byte of its memory or not. I assume you (Pat) are aware that x86 PCI bus ATA DMA engines (even old ISA DMA engines) can not be programmed to transfer an odd number of bytes? Only transfers of an even number of bytes is supported. The x86 ATA DMA device driver must know this when it programs the PCI bus DMA engine (when it builds the PRD list). Just as it must know this when doing the REP INSW/OUTSW thing during PIO data transfers. Please tell me what/where is the problem here? >I'll try to find someone with money to pay for the air flights it might take >to persuade Ansi to at least make reality optional. No reality is not >negotiable. It's real. It's over already. While a in person presentation is the best way to deal with T13, sending a proposal to T13 via email works too! I'm am just curious what you think T13 should change in ATA/ATAPI-x (and even what T10 should change in MMC-x, etc). *** Hale Landis *** www.ata-atapi.com ***
