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The asserting of an interupt to the host is handled by the host adapter. If a FIS is received from the device indicating it wants to interrupt, the host adapter either interrupts the host or not depending on the state of the nIEN bit in its shadow Control register. There is no need to send a FIS to the device when the Control register is written except when the state of the SRST bit is changed. See the state diagram figure 7 and its associated text. Regards, Pete -----Original Message----- From: Larry Barras [mailto:[EMAIL PROTECTED] Sent: Wednesday, February 26, 2003 8:56 PM To: [EMAIL PROTECTED] Subject: [t13] ATA-7 vol 2 question? This message is from the T13 list server. I have a question about the vol 2 of ATA-7, (SATA). If a host sets the state of the nIEN bit in the device control register, does that get transmitted to the drive as an control register update FIS and then what is the correct response from the drive? Has this ever been officially figured out? -- --------------------- I make stuff go. --------------------- Larry Barras Apple Computer Inc. 1 Infinite Loop MS: 306-2TC Cupertino, CA 95014 (408) 974-3220
