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Mark, You are assuming SATA > 1.0 ?? Shadow registers are not exposed for the most part. What is more fun is to watch CRC errors goto the controller for a retry when the error was in the phy originally. Cheers, Andre Hedrick LAD Storage Consulting Group On Mon, 14 Jul 2003, Mark Overby wrote: > This message is from the T13 list server. > > > I have seen some drives that R_ERR in the middle of a DMA transaction and > then don't send the FIS to update the shadow registers in the controller. > You could be seeing this problem, but you'd need to look a SATA bus trace to > be sure. > > -----Original Message----- > From: Hale Landis [mailto:[EMAIL PROTECTED] > Sent: Wednesday, July 09, 2003 9:32 PM > To: T13 List Server > Subject: [t13] SATA question > > This message is from the T13 list server. > > > What causes a PCI bus SATA controller to stop responding in the > middle of a command? Specifically, in the middle of a READ DMA > command, what would cause the drive status to change to FDH or FFH > and then cause the controller and drive(s) to ignore a Soft Reset and > continue to return status of FFH for all reads of any ATA register? > > Hale > > > > *** Hale Landis *** www.ata-atapi.com *** > >
