t13 Forum,
Here is a new list of issues that I came across when reviewing the latest rev 3b of Volume 3.
I hope you have a chance to review them and get some answers or comments before the meeting.
John
1. 13.2 Is Parallel Emulation Required? Clause 13.2 is normative, and so is clause 18.
2. 14.5.6.1 Idle Bus State: During the idle bus condition, the differential signal diminishes to zero while the common mode level of 250 mV remains. Should this be for DC coupled only?
3. In 14.5.6.2.2 (Fig 36) DEVICE SM, state DP11, can I clarify that transition DP11:DP6 is Device initiated wakeup transition when device link negates Partial signal, and that DP11:DP4 is Host initiated wakeup (COMWAKE) that is received just while device has deasserted partial signal? Same in DP12 transitions.
Also remove xx: DP6 entry point if above is correct. (referred to in 14.5.6.2.3.1 (d) COMRESET figure 37 text.
4. What happens if 14.5.6.2.2 fig 36 state DP9 is entered due to a failure to wakeup, and then a COMWAKE is received from the host, should it say go to DP4? transition to state DP6 (device initiated wakeup transition) is taken just as the host sends COMWAKE?
5. In 14.5.6.2.2 figure 36, Device Phy Initialization, state DP6, remove xx:DP6
Also in transition DP7:DP9, add “or fail to resume”
6. Clause 15.4.8.1 Table 23 - 20 Dword Latency example does not add up to 20.
7. In 15.7.1.1 figure 54, state LS4, the term LRESET is used. This is not a defined term. Also in text.
8. In 15.7.1.2 Link transmit & 15.7.1.3 Link receive state diagrams, should remove “& PhyRdy” from various states since not shown consistently, possibly causing confusion, and notes clearly state if PhyNRdy, to transition from any state to LS1:L_NoCommErr
Would like to add Host to LT1, Device to LT2, and replace Data Dword with FIS Payload Dword in LT4 for clarity. Also state LT4:L1 should say FIS, not frame & add word “priority transition”
9. 15.7.1.3 state LR2 states “and the FIFO is not ready to receive an FIS”. This is only true if we add a state to each of the entry SM’s to say to go to LR1 directly if it is ready to receive a FIS. Easire to remove condition. (figure & text).
10. 16.5.4.1 (SBD FIS) it says:
Some the serial implementation of ATA to the parallel implementation of ATA bridge solutions may elect to not support this FIS. Upon reception, such bridge solutions may process this FIS as if it were an invalid FIS type and return the R_ERR end of frame handshake.
This is a hang. It should SYNC terminate?
Also, this note should indicate that some operations may not be possible if this FIS is not supported (LCQ)
11. 11.16.5.1 Clause says:
All reserved fields shall be written or transmitted as all 0's
All reserved fields shall be ignored during the reading or reception process.
Does this mean the host shall not write non-zero or shall mask to zero?
What does ‘reading or reception’ mean?
12. 14.5.6.2.8 In Power-on Sequence clause it says:
Host/device power-off - Host and device power-off. There is host side signal conditioning that will pull the host TX and RX pairs low if power is off. Is this correct?
13. Power-on Sequence fig 39 Clause 14.5.6.2.8 step g) device responds, is different than COMRESET clause 14.5.6.2.3.1 step f) and COMINIT 14.5.6.2.4 step d) should they be the same? COMRESET/COMINIT says speed adjust is 2048 Dwords, Power-on description 14.5.6.2.8 g) says to transmit them for 54.6us at that rate. Which is correct? Also ensure State diagrams and state descriptions are correct.
14. 14.5.6.3.1 figures 40-41, ON to Partial/Slumber:
The diagrams show a signaling “Device to Partial” after the PMACK. What should be transmitted at this time? LPM4 says only 4 PMACK’s may be transmitted and then the bus is quiescent. Should ALIGN’s be transmitted?
Note: if the host stops transmitting immediately after 4 PMACK’s then the device may see this as a loss of signal due to the latency through the elasticity buffer. It seems you should transmit something to allow for the elasticity buffer latency.
Can ALIGN’s be within PMACKs?
Clause 14.5.6.4.1 detailed sequence steps j-l) does not agree with figure.
15. 16.5.8.2 thru .5 PIO Setup need to indicate to load all shadow registers, not just status & E_Status registers.
16. 16.6.8 Host Transport decompose a DMA Activate FIS diagram.
This title is not complete. This also is DMA Read SM. (see HTDA5)
Need to add DMAT warning here also.
17. 16.7.1 Figure 77, state DTI1:DTI0 goes directly to DT_DeviceIdle, it needs to (possibly go to a new state) to wait for FIS completion, notify the transport layer of the error, then go to DT_DeviceIdle.
18. 16.7.7 Figure 83, Is DMA Abot in DTDATAI1 DMAT? Transition DTDATAI2: DTI0 says to report the status to the Link Layer. Shouldn’t this be to the Command layer? Wasn’t the error status reported by the Link? This same condition appears in many places, is it correct?
19. 16.7.10 In figure and text, need to clarify if DMAT meant everywhere Abort is used. See DTDATAO2 text also.
20. 16.7.11 Can we add a comment that use of this FIS is not defined for devices?
21. 17.2 Device Idle. States DI2:DI3 need description of Queue abort.
State DI1 needs to say If BIST type notify app layer and transition to ?
22. 17.6 Why doesn’t this protocol have the same SRST statement as the other protocols at the beginning of each protocol?
23. 17.x Where is the BIST protocol? (not a command)
24. 17.10 DMA Data Out protocol says:
A single interrupt is issued at the completion of the successful transfer of all data required by the command. What about if error, DDMAO3 says I=1 even if error.
25. 17.12 Figure 100 READ DMA QUEUED command protocol.
The command layer state diagrams do not account for the non-release option for DMA if the data is not ready “immediately”. Should the non-release state say “ready to transfer data, or no release desired”?
Guidance, OK, Edit change for review
26. Clause 18 State HA0 (probably others also) have many places where the host is sending Register DH FIS’s
27. 20.2 Phy error conditions is often not clear whether it is talking about the Host Phy or the Device Phy, or both.
28. Global: Is the “application layer” the came as the “Command Layer”? The terms seem to be used interchangeably. Can we just use one term?
29. Global: Some places say “gen 1 UIoob”, aren’t all UIoob gen1? Change?
John Masiewicz
Senior Technical Staff
Advanced Concepts
Western Digital
949-672-7686
