T13,

I posted a document that shows how I plan to change the Register HD FIS mapping to change the “task file” concept to a “Serial Transport” mapping of the commands. This methodology closely follows the material that Curtis Stevens posted (e04139r2) and treats commands as coming from the generic command structure proposed there. I am formalizing the concept of a “Command FIS” and “Control FIS”. These terms were used loosely in SATA and removed in ATA-7.

The Serial Transport document will describe how to map 28-bit commands and 48-bit commands into a Command FIS. There are therefore two different mappings. I took care to preserve as much reference to prior task file registers as possible, so that the current knowledge base of ATA should be able to easily adapt to FIS based mapping.

 

Please review the material and provide comment as you did with the command structure recommendations. These two documents will have to be coordinated, since I am “mapping” commands into FIS’s now. I think the FIS mapping concept is very straightforward, but eliminates the parallel baggage and register terms. If there is some consensus on this methodology, then I will proceed to complete the Control FIS and then the Device to Host FIS mappings.

 

John Masiewicz

Western Digital

(949) 672-7686

 

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