This message is from the T13 list server.
Here are the T13 reflector items that have no clear resolution since the June meeting. Dan: Please put these on the agenda. All: Please review your positions and be ready to comment. ------------------------------- 6/23 Joseph Chen Read lookahead (ATA8-ACS) Should ATA8-ACS rename this to SET FEATURES subcommand to 'enable/disable read cache' ? There was a lengthy discussion on the reflector, with no clear concensus. ------------------------------ 6/30 Yamini Shastry Count register (ATA8-ACS) The description for the count field in ATA8-ACS for *Ext commands such as Read Multiple Ext, Read Sectors Ext, Read Verify Sectors Ext etc., says: "Count: The Number of sectors to be transferred. A value of 00h indicates that 256 sectors are to be transferred." Should that be 65536 instead of 256? ----------------------------------- 7/5 Alexander Krebs PIO "DRQ data block' definition (ATA8-STP) The definition is not 'crystal clear enough to implement PATA emulation on SATA with consistency and accuracy. A lengthy discussion showed that there are several special cases. Perhaps we need a 'note' in the 'emulation' section of the SATA document. -------------------------------------- 7/6 Yamini Shastry LBA parameter in FIS (ATA8-AST) In the ATA8-AST spec: the description for FIS fields such as those of Response FIS refer to the ATA8-ACS spec. For ex: The LBA field in the Response FIS in ATA8-AST sec 7.5.3.1 says that the value depends on the type of command being sent and refers to the ATA8-ACSxxx. Lets take the example of a WRITE DMA EXT (7.63), the ATA8-ACS spec specifies that the Normal Output (table 64) and Error Output (Table 78) for this command, have the LBA and count fields reserved. Now does that mean that the Response FIS from the device to host to the WRITE DMA EXT on a serial transport should actually have these fields reserved (I.e. set to zero)? I ask is this because I always see that the devices actually set this to the Ending LBA address for the I/O but I guess the receiver can't rely on that. Now is it even expected that the device would set the LBA value on the response when the ATA8-ACS spec says they are reserved? ---------------------------- 7/7 Mark Overby Question on text for SECURITY ERASE UNIT (ATA8-ACS) In reviewing portions of ATA/ATAPI-7 relating to SECURITY ERASE UNIT, I have found that there may be a conflict in the information that could lead to unexpected behavior as observed by the host. I'm bringing this up here so that the collective knowledge of the original intent of SECURITY ERASE UNIT can be used to determine if clarification or other is needed. If a host encounters a drive that has no password set and is currently in the disabled / unfrozen state (state SEC1 from the security mode state diagrams in figure 5, ATA/ATAPI-7 volume 1) the SECURITY ERASE UNIT (and the requisite SECURITY ERASE PREPARE) command is allowed to be sent (Table 4). However, in the text for SECURITY ERASE UNIT, clause 6.44.8 it states: “If the password does not match the previous password saved by the device, the device shall reject the command with command aborted.” What happens if no password has been set? Should the host issue a password of all zeros? Does it matter what the host sends? Is it expected that this should work? The behavior of when no password has been set is unclear. ---------------------------- 7/12 Curtis Stevens READ LOG EXT (ATA8-ACS) There is an inconsistency in ATA/ATAPI-7 that I think needs to be addressed in the errata that is currently under development… READ LOG EXT is not prohibited for ATAPI devices WRITE LOG EXT is prohibited for ATAPI devices There is no mention of GPL commands in the packet feature set description. I believe that ATA/ATAPI-7 would be more consistent if the prohibited statement were removed from the WRITE LOG EXT. In ATA8 we could make WRITE LOG EXT optional?? -------------------------------------- 7/13 Mark Overby FLUSH CACHE EXT and FLUSH CACHE behavior (ATA8-ACS) What is the behavior of a drive if FLUSH CACHE EXT and FLUSH CACHE if the write cache is disabled. Under the current reading of ATA/ATAPI-7 (and 8), the standard is silent. It would be legal for a device to abort the command from my reading. Based on the text in the error outputs, it would appear that the intent was that the device completes the command successfully even if the write cache is disabled. This reading is based on the fact that the described error case refers to the device being unable to write to the media. Is this the correct intent? If so, I suggest we propose language to make that clear. This comes up as a result of the SAT work in T10 with the behavior of START STOP UNIT. ---------------------------------------- Thank You !!! ----------------------------------------------------------------- Jim Hatfield Seagate Technology LLC e-mail: [EMAIL PROTECTED] s-mail: 389 Disc Drive; Longmont, CO 80503 USA voice: 720-684-2120 fax....: 720-684-2711 ==========================================
