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Hi all, I have a question on the default value of the Device Control Register. Is it spec'ed anywhere? I could not find it in ATA/ATAPI-6, SATA 1.0a nor SATA 2.5. The question came up in SATA context. A host may skip sending a Reg FIS in case the Device Control Register was written but the SRST bit was not changed. Let's assume the host's default value of the Device Control Register is 0xfe. Let's also assume software never wrote this register before. Now, software wants to reset the device by setting SRST=1. Since the SRST bit did not change, the host may skip sending the Reg FIS. The device never sees SRST==1. BAD. To make this working correctly, at least Device Control Register bit 2 must have a reset value of 0. IMHO, the whole register should have a reset value of 0x00. Am I right here? Or software must write SRST=0 before writing SRST=1 which is even more difficult to realize with plenty of legacy software around. A related issue is whether host software can assume that nIEN is in a defined state after power up/reset. If yes, what value can it assume? Thanks, Alex.
