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The DRQ bit is located in the status register. There is no drive register. If you mean the device (old dev/head register), that would be the wrong register as well. In order to know that the DRQ block has been completed, you have to go back, wait for BSY to drop at the device, and then continue transferring data. (Assuming there is more data to transfer). Note - that BSY could go high and drop again before your host can read the status register, so the host loops through HPIOI2->HPIOI1->HPIOI2 very quickly and you won't actually spend any time there. -----Original Message----- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Michael G. Farley Sent: Tuesday, January 31, 2006 10:19 AM To: [email protected] Subject: [t13] ATA/ATAPI-6 HPIOI2:HPIOI2 Transition This message is from the T13 list server. To whom it may concern, I work with Green Hills Software based in Santa Barbara, CA. I've been studying the ATA/ATAPI-6 Standard, and I think I've found a discrepancy. In the Transition from HPIOI2 to HPIOI2, shouldn't the first line read, "When the host has read the device Drive register..."? The standard instead reads, "When the host had read the device Status register". Transition HPIOI2:HPIOI2: When the host has read the device status register and the DRQ data block transfer has not completed, then the host shall make a transition to the HPIOI2: Transfer_Data state. I noticed that the latest ATA/ATATPI-7 Standard reads the same as the ATA/ATAPI-6 Standard. When I looked into the Figure 25 and 26, they read "device Drive register" and not "device Status register". You are the only email address I could find in the Standard. If you are not the person I should be contacting, please let me know who is. --Mike Farley
